Cores

PCI Express IP Core is fully compliant and programmable.

Suited for telecom, networking, storage, and video applications, x1, x4, and x8 lane LogiCORE(TM) provides programmability and reconfigurability of Xilinx FPGA architecture to build fully compliant and interoperable PCI Express platforms. Product is compliant to PCI Express base specification v1.1 and has successfully completed all PCI Express compliance and interoperability tests administered at...

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Multi-Threading Cores are used in embedded applications.

Delivering real-time responsiveness, MIPS32-® 34K(TM) cores implement MIPS-® MT ASE and leverage 24KE(TM) microarchitecture that includes MIPS DSP ASE. Products are designed so that as one thread stalls additional threads are instantly fed into pipeline and executed. Built on 90 nm G process, 500 MHz cores measure 2.1 mm-² and consume 0.56 mW/MHz @ 1.0 V. They are configured with max of 2 VPEs...

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Processor achieves frequencies over 750 MHz.

Provided in 90 nm foundry process, ARM1176JZF-S(TM) processor features ARM-® Artisan-® Advantage(TM) cell library and memories and occupies 2.4 mm-² silicon area. It delivers performance of over 920 Dhrystone MIPS for existing applications and operating systems without software re-design or re-compilation. Product also includes 16 KB instruction cache, 16 KB data cache, 4x high-performance...

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FPGA IP Core is suited for Controller Area Networks.

CAN LogiCORE(TM) provides features and capabilities to implement Controller Area Network (CAN) protocol with Xilinx Spartan(TM) and Virtex(TM) Platform FPGAs, delivering complete, flexible hardware/software solution that addresses automotive market requirements. Fully verified intellectual property (IP) core conforms to ISO 11898-1 CAN 2.0A/B standards and lets designers program as many CAN...

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Microprocessor IP Core targets portable applications.

Featuring RISC architecture, Model XAP4 has both 16-bit data and address buses and is capable of running programs up to 64 kbytes. On 0.18 micron CMOS fabrication process, unit can deliver up to 63 Dhrystone MIPS at clock frequency of 117 MHz. SIF debug logic provides full control over processor and access to debug registers, together with non-invasive access to any part of processor's memory map...

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IP Core is optimized for Stratix® II GX FPGAs.

PCI Express MegaCore-® is delivered with IP toolbench GUI that designers can use to configure core to corresponding testbench and user reference designs for x1, x4, or x8 endpoint links. PCI Express function targets Stratix II GX or Stratix GX FPGAs with embedded transceivers, as well as Cyclone(TM) II or Stratix II FPGAs or HardCopy-® II structured ASICs with external transceiver devices. Only...

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Microprocessor Core achieves 1 GHz clock speed.

Based on Media embedded Processor architecture, Model MeP-h1 allows designers to customize processor configurations, including instructions and embedded memory capacity. It features 9 instruction execution pipeline stages and reorder buffer circuit that manages and shortens waiting cycles for user extension instructions. Based on 32-bit RISC processor, unit is appropriate for digital media...

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FFT Core Library is suited for FPGA devices.

Supplied on one CD, library provides Xilinx FPGA device designers with 60+ Fast Fourier Transform (FFT) cores and includes FPGA netlists for FFT range that covers different target devices. Cores run in continuous real-time and offer FFT transform lengths from 32-32,000 points. HiSpeed and QuadSpeed architectures support complex sample rates to 100 and 500 MS/s, respectively. Each design includes...

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Telecom Infrastructure Products use PowerPC® processors.

Telecom Infrastructure Products use PowerPC® processors.

KatanaQp ATCA blade combines MPC7448 processor pair with 4 PTMC expansion sites, redundant IPMI-based system management interfaces, and PICMG 3.1-compliant ATCA interface. Processors, running at speeds to 1.7 GHz each, can be used for distributed or symmetric multiprocessing. Single-processor PmPPC7448 ProcessorPMC mezzanine card combines offers up to 2 GB RAM, 64 MB flash, and 3 Ethernet ports....

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IP Core for FPGA is designed for programmable devices.

Based on radix-32 architecture, IEEE-754-compliant Floating Point Fast Fourier Transform core transforms complex data ranging from 256 to 1 million points with external memory, if necessary, such as QDR SRAM. Users can change transform length on-the-fly, without reconfiguring programmable device. In chips such as Altera Stratix-II and Xilinx Virtex-4 FPGAs, 4 cores can be implemented in parallel...

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