New Cores Products

IP Core adds FFT capabilities to DSP solutions.

Utilizing both radiation-tolerant FPGA and mathblock fabric resources, CoreFFT v4.0 delivers flexible, fully configurable radix-2 decimation-in-time burst I/O FFT for high reliability radiation-tolerant applications. Program features transform sizes from 32-8,192 points, bit-reversed or natural output order, and selection of unconditional or conditional block floating point scaling. Highly...

Core Generator creates FPGA-based digital filters.

Leveraging embedded radiation-tolerant multiply-accumulate blocks provided in RTAX-DSP FPGAs, CoreFIR v4.0 implements highly parameterizable, single-rate, fully-enumerated Finite Impulse Response filter, delivering essential building block in DSP systems. Product is configurable from 2-240 taps in RTAX-DSP devices with up to 120 math blocks. Running up to 130 MHz, it offers 2-18 bits input data...

Integrated IP-Core serves aerospace and military applications.

Available for licensing as part of GRLIB IP library or separate IP-core in VHDL source code, MIL-STD-1553B IP-core integrates Bus Controller (BC), Remote Terminal (RT), and Monitor (MT). It supports configuration as BC/RT/MT or RT only and connects as master on AMBA bus using DMA for optimal performance together with LEON processor. Solution is provided as soft core together with rich IP library...

Arithmetic Processing IP Core for MP3 Decoders Features Smallest Circuit Size and Lowest Power Consumption

Hoofddorp, Netherlands: Murata, in collaboration with Mathmatec Corporation, has developed an arithmetic processing IP core for MP3 decoders that uses less than 10% of the power required for conventional general software processing. By optimising circuits with original Murata architecture, used in conjunction with the Spinor-® circuit compression technology developed by Mathematec Corporation,...

The ROI of a Full Service Manufacturer

Full service manufacturers incorporate a complete line of production capabilities to facilitate fast, cost-efficient manufacturing of complex products without the need for multiple contractors.

DSP IP Cores add FLAC decoder to existing codec library.

Featuring Free Lossless Audio Codec (FLAC) decoder that supports stereo and multi-channel formats, HiFi Audio DSP family of IP cores are intended for SoC designs targeting products such as cellular phones, DTVs, Blu-ray Disc players, and home theater systems. Integration is facilitated via power, dimensions, support for over 60 audio and voice codecs, as well as post processing software.

Multi-Stream IP Cores target data networking applications.

Delivered as synthesizable Verilog RTL cores or as part of CebaFlex FPGA-based acceleration subsystems, CebaRIP Rapidly Tunable Silicon IP Cores are GZIP and GUNZIP IP cores capable of executing hundreds of thousands of data streams concurrently, without performance degradation. Devices offer context switching that saves state information on data packet boundaries, minimizing network latency....

VLIW 8-MAC DSP Core accelerates data throughput.

Intended for SoC designs, ConnX 545CK dataplane processor core combines base CPU controller with DSP that can sustain 8 simultaneous MAC (multiply-accumulate) operations on independent data pairs per cycle utilizing 160-bit vector registers. It features 3-issue VLIW (very long instruction word) architecture with eight 16-bit multipliers that operate in SIMD mode. Capable of 600+ MHz operation,...

Embedded Control Cores target high-performance applications.

Designed to facilitate SoC integration, Diamond Standard controllers include 5 upward-compatible processor cores based on common Xtensa architecture. These 32-bit embedded control cores, suited for embedded control functions in compute-intensive dataplane functions, are available as cache-enabled and cache-less controllers with on-chip debug hardware that achieves Dhrystone 2.1 results of...

MIPI 4G DigRF-Compliant IP accelerates LTE/WiMAX SoC development.

DesignWare-® MIPI-® 4G DigRF(SM) Master Controller IP enables designers to lower risk of integrating DigRF interfaces into baseband ICs and application processors accelerating time-to-market of LTE and Mobile WiMAX SoCs. Compliant to MIPI DigRF v4 1.00 specification, controller implements features defined for protocol and PHY adaptation layers. Configurability of IP RTL provides flexibility for...

DICOM-Compatible IP Core supports 8- and 12-bit JPEG.

Compact JPEG-E-X IP core supports both 8-bit Baseline and 12-bit Extended Sequential modes of JPEG image compression standard. Conformant to DICOM medical standard, unit compresses images from 8-12 bits per color sample, and also compresses non-standard motion JPEG streams. It can process 450 MS/sec with 69K gates in typical ASIC 0.09 micron process, 280 MS/sec in high-end FPGA devices, or 30 fps...

Innovative Dampney Coating Systems Suit Even the Most Specialized Applications

Dampney's high performance coating systems provide protection against extreme weather, chemicals, and corrosive environments for atmospheric, immersion, and underground applications. Check out the video to learn more.