Cores

Xilinx Teams with Helion to Deliver Enhanced Device Security for Low-Cost FPGAs

New DeviceDNA Checker IP provides robust security solution for Spartan-3 Generation FPGAs LAS VEGAS, Jan. 7 -- At the Consumer Electronics Show (CES) today, Xilinx, Inc. (NASDAQ:XLNX), the world's leading provider of programmable solutions, announced that it has teamed with data encryption IP specialist Helion Technology to enhance the security features in the Xilinx(R) Spartan(TM)-3 generation...

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IP Core facilitates developmet of SATA storage solutions.

MSATA PHY S130A IP core is designed for Semiconductor Manufacturing International's 130 nm Generic process. With integrated Serial ATA controllers, PHY IP core targets both host and device applications running at either 1.5 or 3.0 Gbps. It features analog circuitry residing in I/O ring, less than 3 mm-² footprint, and low power optimization with less than 75 mW per lane including termination...

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Microprocessor Core Module features on-board mass storage.

Utilizing Dynamic C v10.21 with Megabyte Code Support, RabbitCore RCM4300 Series enables designers to use over 1 Mbyte of SRAM for shared code and data. Users can also implement up to 1 GB of storage using miniSD(TM) memory card. Providing essentials needed to design microprocessor-based embedded system with mass storage, RCM4300 development kit is available and includes 512 MB miniSD card,...

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Board offers memory support for data intensive applications.

Providing on-board mass storage for data intensive applications, RCM4300 series provides capability to implement up to 1 GB of storage using miniSD(TM) memory card. It enables complex embedded applications such as data encryption and security-enabled web servers. Module is also available as development kit with 512 MB card, prototyping board, and Dynamic C v10.21 with Megabyte Code Support(TM),...

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Renesas Technology Completes Design of CPU Core for Next-Generation Microcontrollers, and Introduces Details of 'RX Family'

The new MCUs will be built on a 90-nm flash process and achieve the world's top-class performance and code efficiency among CISC devices TOKYO, November 8, 2007 - Renesas Technology Corp. today announced that it has completed the design of an innovative new CISC(1) (Complex Instruction Set Computer) CPU architecture that will deliver unmatched capabilities in code efficiency, processing...

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Chipidea Achieves Certification for USB High-Speed PHY IP on Chartered's 90nm and 65nm Customer-Ready Technologies

Industry's Widest Portfolio of Silicon-Proven USB IP Speeds Time-to-market for Portable Computing Device Manufacturers PORTO, Portugal, Dec. 4 / -- Chipidea, the Analog Business Group of MIPS Technologies, Inc. (NASDAQ:MIPS), today announced that its USB high-speed physical layer (PHY) IP has been certified on 65nm and 90nm process technologies available from Chartered Semiconductor Manufacturing...

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Intel's Fundamental Advance in Transistor Design Extends Moore's Law, Computing Performance

Abstract: Built using an entirely new transistor formula that alleviates the wasteful electricity leaks that threaten the pace of future computer innovation, Intel Corporation today unveiled 16 server and high-end PC processors. In addition to increasing computer performance and saving energy use, these processors also eliminate eco-unfriendly lead and, in 2008, halogen materials. Santa Clara, CA...

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CORDIC IP Core optimizes use of FPGA resources.

Vector Rotation/Translation IP core product offers CORDIC (COordinate Rotation DIgital Computer) design that addresses CORDIC use of FPGA logic resources. It provides vector rotation for polar-to-rectangular coordinate transformation and vice versa, using technique that allows single FPGA to be used. Operating on input width of 20 bits, magnitude width of 20 bits, and phase width of 12 bits, RFEL...

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FPGA-Based Network Timing Solution supports customization.

Implemented using Xilinx-® Virtex(TM) or Spartan(TM) FPGA, carrier-class solution is delivered as 2 IP cores (NGNTime and FemtoTime) that are fully interoperable with NTP and provide migration path for Version 2 of IEEE 1588 or PTP. This provides designers of next-generation wired/wireless communication networks with embedded programmable timing solution that supports field upgradeability and...

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Arrow to Distribute MathStar Semiconductor Products in India

HONG KONG, Nov. 26 - Arrow Asia Pac Ltd., a business unit of Arrow Electronics, Inc. (NYSE:ARW), announced today that it has signed a distribution agreement for the India market with MathStar (NASDAQ:MATH), a leading fabless semiconductor company offering high-performance programmable logic solutions. Through the agreement, Arrow will distribute the full range of MathStar's field programmable...

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