Cores

Programmable DSP Core enhances communication/multimedia SoCs.

Offering over 1 GHz DSP performance using 40 nm process technology, CEVA-X1643(TM) boosts overall chip performance for applications such as wireline/wireless communications, surveillance, and portable multimedia. Data cache and coupled memory architecture streamline software integration and software porting from other DSP platforms. Along with integrated Power Scaling Unit, features include...

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ATSC-MH Demodulator Core for the US Mobile DTV Market from Iberium Communications

SAN FRANCISCO - Iberium Communications, Inc., a leading provider of digital television (DTV) demodulation intellectual property, announced today availability of its Santana digital demodulator core for the US mobile DTV market. The core is fully compliant with the mobile DTV standard ATSC-MH (A/153) ratified in October of 2009. The new Santana ATSC-MH (A/153) core, along with the existing Garcia...

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Controller and PHY IP meets MIPI DigRF v3 and v4 standards.

Available in 40 nm process technologies, DesignWare MIPI M-PHY IP implements all required physical layer functionality defined in MIPI DigRF v4 specification. Integrated analog Phase Lock Loop and biasing block help guarantee integrity of high-speed clocks and signals required to meet strict timing requirements of protocol. In addition, DesignWare MIPI M-PHY supports optional dithering...

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Hitachi Metals Begins Recycling of Amorphous Transformer Cores

Recycling Plant To Be Established within Yasugi Works TOKYO, Japan - Hitachi Metals, Ltd. today announced the development of recycling technology for manufacturing its amorphous metal (Metglas®) directly from amorphous cores taken from transformers that have been taken out of service. Hitachi Metals has decided to establish a facility to conduct this operation within its Yasugi Works in Japan....

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Hi-Fi Audio IP is offered in 40 and 55 nm process technologies.

Available in 40 and 55 nm process technologies, DesignWare® 96 dB Audio IP targets consumer electronic applications requiring Hi-Fi playback and record capabilities with minimal power consumption and silicon area. Modular nature lets designers select specific features for target applications, while function set covers signal processing, signal conditioning, clock management, power management,...

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IP Core adds FFT capabilities to DSP solutions.

Utilizing both radiation-tolerant FPGA and mathblock fabric resources, CoreFFT v4.0 delivers flexible, fully configurable radix-2 decimation-in-time burst I/O FFT for high reliability radiation-tolerant applications. Program features transform sizes from 32-8,192 points, bit-reversed or natural output order, and selection of unconditional or conditional block floating point scaling. Highly...

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Core Generator creates FPGA-based digital filters.

Leveraging embedded radiation-tolerant multiply-accumulate blocks provided in RTAX-DSP FPGAs, CoreFIR v4.0 implements highly parameterizable, single-rate, fully-enumerated Finite Impulse Response filter, delivering essential building block in DSP systems. Product is configurable from 2-240 taps in RTAX-DSP devices with up to 120 math blocks. Running up to 130 MHz, it offers 2-18 bits input data...

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Integrated IP-Core serves aerospace and military applications.

Available for licensing as part of GRLIB IP library or separate IP-core in VHDL source code, MIL-STD-1553B IP-core integrates Bus Controller (BC), Remote Terminal (RT), and Monitor (MT). It supports configuration as BC/RT/MT or RT only and connects as master on AMBA bus using DMA for optimal performance together with LEON processor. Solution is provided as soft core together with rich IP library...

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Arithmetic Processing IP Core for MP3 Decoders Features Smallest Circuit Size and Lowest Power Consumption

Hoofddorp, Netherlands: Murata, in collaboration with Mathmatec Corporation, has developed an arithmetic processing IP core for MP3 decoders that uses less than 10% of the power required for conventional general software processing. By optimising circuits with original Murata architecture, used in conjunction with the Spinor® circuit compression technology developed by Mathematec Corporation,...

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DSP IP Cores add FLAC decoder to existing codec library.

Featuring Free Lossless Audio Codec (FLAC) decoder that supports stereo and multi-channel formats, HiFi Audio DSP family of IP cores are intended for SoC designs targeting products such as cellular phones, DTVs, Blu-ray Disc players, and home theater systems. Integration is facilitated via power, dimensions, support for over 60 audio and voice codecs, as well as post processing software.

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