Cores

Posedge Selects EnSilica's eSi-3250 Processor for Innovative 7-core Residential and SMB Gateway SoC

Solution performs Wire-Speed Routing at multi-gigabit rates Wokingham, UK. EnSilica, a leading independent provider of front-end IC design services, has announced that Posedge, a semiconductor intellectual property and solutions provider based in Sunnyvale (California, USA), has licensed its high-performance eSi-3250 32-bit processor core for an innovative, new Residential and SMB Gateway...

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Quad-Core Processor combines 4 Isaiah cores on 2 dies.

With thermal design power of 27.5 W, 1.2+ GHz VIA QuadCore processor supports multi-tasking, multimedia playback, and Internet browsing. Compatible with 64-bit systems, it includes VIA VT virtualization for legacy software and applications to be used in virtual scenarios without impacting performance. Also included is VIA PadLock with advanced cryptography engine for AES encryption. Processor...

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Vivante GPU IP Cores Power the Latest Freescale i.MX 6 Series of Application Processors

Vivante GPUs enable Freescale to deliver best in class graphics performance for tablets, smartphones, automotive and a wide range of other consumer markets SUNNYVALE, Calif. - Last week at the Linley Tech Mobile Conference held in Silicon Valley, Freescale Semiconductor detailed the GPUs licensed from Vivante powering the recently announced i.MX 6 series of applications processors. The i.MX 6...

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Freescale Licenses Synopsys' DesignWare IP Portfolio to Accelerate SoC Designs

High-Quality, Broad Portfolio and Worldwide Technical Support Helps Freescale Speed SoC Development Time and Lower Risk MOUNTAIN VIEW, Calif. - Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Freescale Semiconductor, a global leader in the design and manufacture of semiconductors for the automotive,...

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ArrayComm and CEVA Demonstrate TD-LTE Base Station

Full TD-LTE PHY functionality implemented on Mindspeed SoC. NEWPORT BEACH, Calif. and MOUNTAIN VIEW, Calif. -- ArrayComm LLC and CEVA, Inc. (Nasdaq: CEVA); (LSE: CVA), today announced the successful demonstration of ArrayComm's BasePort(TM) TD-LTE base station PHY running on high performance CEVA DSP cores. The demonstration was implemented on Mindspeed's Transcede(TM) 4000 System-on-Chip and...

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Application-Level Interface Core aids PCIe FPGA integration.

IP core PCIEXPAIF provides high-level interface between system buses such as AMBA-® AXI4 and PCI Express (PCIe) hard macro blocks available from FPGA vendors Altera and Xilinx. In addition to extensible DMA and other functions to encode and decode Transaction Layer Packets, core includes support for 32- and 64-bit versions of open source Wishbone Bus as well as AMBA-® AHB(TM), AXI(TM), and AXI4...

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Controller IP Core enhances chip-to-chip serial interfaces.

Providing flexibility needed to facilitate board-level design for high-speed chip-to-chip serial interfaces, Interlaken core features fully configurable SerDes lane mapping between logical and physical SerDes lanes. HiFlex architecture is included along with Interlaken-LA, In-Band and Out-of-Band flow control, multiple UI options, flexible statistics counters, and built-in interrupt structures....

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Integrated 100G EFEC IP Cores optimized for FPGAs.

With respective overhead ratios of 7% and 20%, EFEC7 and EFEC20 multidimensional enhanced forward error correction (EFEC) IP cores are optimized for Stratix-® IV and Stratix V series FPGAs. Functionality targets service providers upgrading 10G metro networks and long-haul OTNs to 100G speeds and planning for future 400G support. Both products leverage Streaming Turbo Product Code BCH code...

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Xilinx Introduces Zynq-7000 Family, Industry's First Extensible Processing Platform

Dual ARM Cortex-A9 MPCore Processing System Tightly Integrated with Programmable Logic Extends Embedded System Architectures for Higher Performance and Scalability NUREMBERG, Germany, -- Embedded World -- Xilinx, Inc. (Nasdaq: XLNX) today unveiled the Zynq(TM)-7000 family, the industry's first Extensible Processing Platform (EPP) developed to achieve the levels of processing and compute...

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Silicon SoC IP supports PCI Express® 3.0 base specification.

DesignWare-® IP for PCI Express includes Endpoint, Root Complex, Switch and Dual Mode cores, enabling designers to integrate the 8.0 GT/sec PCI Express 3.0 interface into SoC designs. Embedded DMA engine offloads main SoC processor when moving large amounts of data between PCIe interface and rest of system, and also supports native application interface or ARM AMBA-® AHB(TM) and AXI3(TM)...

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