Cores

Cadence Offers Production Proven USB 3.0 Host Controller IP

USB Design IP is Used in Industry Standard Compliance Program SAN JOSE, Calif. - Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that a production proven host controller intellectual property (IP) for USB 3.0 has been added to the Cadence IP offering. The Cadence-® USB 3.0 xHCI host controller IP was originally developed by Fresco...

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Xilinx Highlights All Programmable and Smarter Vision Solutions at Embedded Vision Summit West 2014

SAN JOSE, Calif. - Xilinx, Inc. (NASDAQ: XLNX), will highlight its All Programmable and Smarter Vision solutions at the Embedded Vision Summit West, May 29, 2014 in Santa Clara, CA.-  Xilinx technology experts will present and demonstrate Xilinx's capabilities and solutions portfolio for smarter embedded vision systems. Xilinx-® All Programmable devices, coupled with Xilinx's hardware-optimized...

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Casa Systems and Teleste Collaborate to Bring Multigigabit Subscriber Speeds to the Cable Access Network

TURKU, Finland and ANDOVER, Massachusetts – Companies are targeting to launch a next generation, DOCSIS 3.1 and CCAP compliant, distributed architecture (RemotePHY) solution Teleste, a leading provider of video and broadband technologies and services [http://www.teleste.com, and Casa Systems, a worldwide leader in next-generation cable edge technology and an innovator of converged fixed-mobile...

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DDR4 PHY IP targets microserver market.

Built on 16 nm FinFET process, Cadence-® DDR4 PHY IP supports unbuffered dual in-line memory module with features such as cyclic redundancy check and data bus inversion. Product implements 4x clocking to minimize duty cycle distortion, multi-band power isolation for noise immunity, and I/O with slew rate control. Combination of 16 nm technology and Cadence's architecture helps customers realize...

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Cadence Announces Immediate Availability of Industry's First Verification IP for PCI Express 4.0 Technology

Support for next-generation PCI Express architecture enables faster completion of functional verification of SoC designs SAN JOSE, Calif. -- Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced the availability of the industry's first verification IP (VIP) supporting PCI Express-® (PCIe-®) 4.0 architecture. This VIP enables designers to quickly and...

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CommAgility VPX Module Provides Rugged DSP and FPGA Performance TI and Xilinx Processors for Software Radio, Imaging or Radar Applications

CommAgility VPX Module Provides Rugged DSP and FPGA Performance TI and Xilinx Processors for Software Radio, Imaging or Radar Applications

TI and Xilinx processors for software radio, imaging or radar applications Loughborough, UK – CommAgility today announced the VPX-D16A4, a rugged high performance DSP and FPGA based card in the compact VITA™ 65, 3U OpenVPX™ form factor. The module is ideal for applications such as software defined radio (SDR) (including LTE, Remote Radio Head (RRH), WiMax and Cloud RAN), imaging or radar,...

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Qualified IP Blocks minimize risk of design re-spins.

Available on ONC18 180 nm process technology, Qualified IP Blocks bring predictability to product design cycles. Products provide functions that range from small-pitch column-parallel ADC and cryogenic-compatible LVDS drivers to ultra-low power oscillator and very-small footprint OTP memory. IP Blocks are applicable to wide range of customer end-markets including military/aerospace, medical,...

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DSP Core supports Bluetooth connectivity.

Leveraging instructions and interfaces added to multifunctional CEVA-TeakLite-4 v2 architecture, CEVA-TeakLite-4 DSP runs CEVA-Bluetooth connectivity in addition to broad range of audio and voice software packages, always-on user interface functions such as voice triggering and face activation, and full suite of sensor-fusion capabilities, all on single core. Typical applications...

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EZchip Highlights NPS Opportunities in Emerging White Box Networking

YOKNEAM, Israel - EZchip Semiconductor Ltd. (NASDAQ:EZCH), a leader in high-performance network processors, is highlighting new opportunities for its NPS, Network Processors for Smart networks, brought about through powerful new trends in the networking market. EZchip's NPS, already publicized as providing distinct performance acceleration for SDN and NFV networks (for details visit...

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Xilinx Demonstrates FPGA-Based Acceleration Technology for Next-Generation Data Centers at IBM Impact 2014

As a member of the IBM OpenPOWER Foundation, Xilinx delivers industry's first key value store accelerator demo based on the IBM CAPI protocol SAN JOSE, Calif.- – Xilinx, Inc. (NASDAQ: XLNX) today announced it will demonstrate the industry's first key value store acceleration demo based on the IBM CAPI protocol at the IBM Impact 2014 Conference.-  As a member of the IBM OpenPOWER Foundation,...

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