Media Alert: Cadence to Showcase Multi-Purpose, Low-Power DSP at Linley Mobile & Wearables Conference 2016
SAN JOSE, Calif. - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that David Heine, senior design engineering architect, is scheduled to present a paper on multi-purpose, low-power DSPs for mobile and other markets at the Linley Mobile Wearables Conference on July 27, at the Hyatt Regency in Santa Clara, CA. The two-day conference runs July 26-27. WHAT: David Heine is scheduled to...
Read More »Xilinx and Its Ecosystem Demonstrate All Programmable and Smarter Vision Solutions at ISE 2015
Demonstrations highlight design platforms, IP, and reference designs that provide the fastest way to bring 4K UHD and packet-based video systems to market SAN JOSE, Calif.,- – Xilinx, Inc. (NASDAQ: XLNX) and its ecosystem will demonstrate All Programmable and Smarter Vision Solutions at ISE 2015. Through a series of in-booth demonstrations, Xilinx and its Alliance Members will showcase design...
Read More »Actions Semiconductor's Tablet Chipsets Provide Advanced, Efficient Graphics with Imagination's PowerVR GPUs
Companies extend close relationship for future-generation OWL chipsets ZHUHAI, China and BARCELONA, Spain- – Imagination Technologies (IMG.L) and Actions Semiconductor Co., Ltd. (Nasdaq: ACTS), one of China's leading fabless semiconductor companies, are extending their collaboration in bringing advanced graphics to a range of Actions' OWL chipsets which are designed to address each segment of...
Read More »Configurable Image Processor is designed for SoC integration.
Based on PowerVR Raptor imaging processor architecture, PowerVR Series2 V2500 intellectual property (IP) core offers- scalable and configurable solution targeting devices from mass-market phones- and automotive to connected home security- and premium smartphones/tablets. Product operates as- cooperative part of- heterogeneous computing platform, and close connections between it and other SoC...
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Caps & Plugs Designed for Peace of Mind
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Read More »Imaging/Video Dataplane Processor handles complex functions.
Tensilica-® Imaging and Video Processor-Enhanced Performance (IVP-EP) core is available as- configurable core and complete, pre-built subsystem. Integrating DMA transfer engine with up to 10 GBps throughput and local memory throughput of 1,024 bits per cycle, 4-way VLIW architecture delivers parallelism intermixed with code-compact instructions, with 32-way vector SIMD dataset. Imaging-specific...
Read More »Cadence and Sensory Reduce Voice Activation Power Dissipation in Mobile Devices to Less than 17 MicroWatts
HiFi Mini Running Sensory TrulyHandsfree Voice Activation Solution Now Uses 33 Percent Less Power SAN JOSE, Calif. - Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, and Sensory today announced that they have further lowered the power consumption of their industry-leading, ultra-low power DSP-based voice activation solution, which is an ideal...
Read More »Baseband DSP IP Cores are optimized for low-power applications.
Respectively, Tensilica-® ConnX BBE32EP and BBE64EP are 32- and 64-MAC baseband DSP IP cores optimized for complex number processing at low power. Products excel at processing algorithms for LTE, LTE-Advanced, 802.11ac, HDTV demodulation, 3G/HSPA+, and WiFi (including MIMO processing). Supporting power consumption levels that reduce need for hardware accelerators, cores suit such applications as...
Read More »Microwave Backhaul Solution maximizes 4G throughput capacity.
Based on Altera's FPGAs and QAM modem IP cores from Escape Communications, Microwave Backhaul Solutions address traditional markets from 6–42 GHz and emerging applications in E-band (70/80 GHz) and V-band (60 GHz) all-outdoor radio markets. Escape backhaul modem IP is optimized for use on Altera Cyclone V, Arria V, and Arria V SoC FPGAs operating at bandwidths up to 1 GHz and modulation types...
Read More »IP Cores address Next-Gen LTE, MultiCarrier-GSM platform needs.
Offering scalable support, Smarter Radio Solutions – Crest Factor Reduction (CFR) and Digital Pre-Distortion (DPD), part of Xilinx-® SmartCORE™ IP suite – meet performance, power, and cost needs of Next-Gen LTE and Multi-Carrier GSM (MC-GSM) platforms. Xilinx CFR and DPD IP cores allow >40% efficiency to be achieved for LDMOS-based Power Ampliers (PAs) and up to 50% for GaN-based PAs....
Read More »ANSYS and NVIDIA Deliver First Commercial GPU-Accelerated Fluid Dynamics Solver
Collaboration develops solution that dramatically speeds up simulation of large multiphysics models PITTSBURGH – ANSYS Inc. (NASDAQ: ANSS) users can now leverage NVIDIA graphics processing units (GPUs) to speed up fluid dynamics simulation and quickly handle large, complex simulation models. Available for the first time with ANSYS-® Fluent-® 15.0, the jointly developed GPU-accelerated...
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Vector® Sports Training Ball Offers Visible Point of Contact
Our goal is to help every athlete derive maximum enjoyment from their sport and become a better player. We offer a line of innovative training tools that combine cutting-edge technology and out of the box thinking to deliver an unbeatable competitive advantage. The Vector® Sports Training Ball is just another example of our commitment to innovation. To learn how the Vector® is helping ballplayers everywhere, see our video.
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