Synopsys, Inc.
Mountain View, CA 94043
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Software aids in next-generation IC design implementation.
Place-and-route solution, IC Compiler v2007.03, combines multi-corner/multi-mode optimization technology, 45 nm physical design support, and signoff-driven timing closure. Coupled with capacity approaching 10 million gates on 16 GB platforms, product allows users to take on larger block partitions. Physical feasibility flow lets users generate and analyze multiple trial floorplans to determine...
Read More »OCP-IP Standardizes on Synopsys' DesignWare Verification IP for OCP-IP's CoreCreator Verification Toolset
MOUNTAIN VIEW, Calif. and BEAVERTON, Ore., April 10 // -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, and Open Core Protocol International Partnership (OCP-IP), an independent non-profit semiconductor industry consortium, today announced that they are collaborating to provide Synopsys' DesignWare(R) Verification IP (VIP) as part of OCP-IP's CoreCreator...
Read More »Synopsys Accelerates Low-Power Designs with Comprehensive Implementation and Verification Solution
MOUNTAIN VIEW, Calif., March 29 // -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, today announced that it is enhancing its comprehensive low-power verification and implementation solution to ensure compliance with the widely supported Unified Power Format (UPF) 1.0 Accellera standard. Proven by over 20 successful multi-voltage tapeouts, the Synopsys solution...
Read More »TSMC and Synopsys Announce CCS Model Support for TSMC'S 65-Nanometer Process
Latest CCS-based Libraries Improve Designer Productivity for Low-Power, High-Performance Designs MOUNTAIN VIEW, Calif. and HSINCHU, Taiwan, March 6 - Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, and Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC; NYSE: TSM), the world's largest semiconductor foundry, today announced the immediate availability of Composite...
Read More »Verification Suite helps measure device parameters at 65 nm.
Hercules(TM) Physical Verification Suite (PVS) supports 65 nm design kits from IBM, enabling IBM foundry customers using Hercules layout versus schematic (LVS) rule files in kit to correlate device behavior to IBM process. Along with device parameter measurement functionality, suite also offers IBM foundry customers access to Hercules design rule checking (DRC). Tools work together to help users...
Read More »Synopsys Proteus OPC Delivers Superior Cost of Ownership on Intel® Core(TM) Microarchitecture
Optimized x86-64 Hardware Offers Superior Price/Performance for OPC Compared to Custom Hardware Platforms MOUNTAIN VIEW, Calif., Feb. 27 -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, today announced that its industry-leading Synopsys Proteus optical proximity correction (OPC) software has achieved substantial processor and memory improvements when optimized for...
Read More »Synopsys IP for PCI Express 2.0 (Gen II) Passes PCI-SIG Compliance
First IP Provider to Pass PCI-SIG Compliance Testing With Complete PHY and Digital Controller Solution MOUNTAIN VIEW, Calif., Feb. 14 -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, today announced that its DesignWare-® PHY and digital controller intellectual property (IP) for PCI Express(TM) 2.0 (Gen II) is the first complete Gen II IP solution from a single...
Read More »Synopsys' DesignWare IP for PCI Express Supports NXP Semiconductors' PXPIPE PHY Interface
Collaboration Delivers Proven Digital Controller IP and External PHY Solution MOUNTAIN VIEW, Calif., Feb. 14 -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, today announced that its DesignWare-® intellectual property (IP) for PCI Express* supports the PXPIPE PHY interface standard from NXP, the independent semiconductor company founded by Philips. Designers...
Read More »Tower Semiconductor Expands High-Voltage Technology Offering with Synopsys' Hercules PVS
New Rule Files Complement Tower's Release of High-Voltage Technology MOUNTAIN VIEW, California and MIGDAL HAEMEK, Israel, December 12/ - Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, and Tower Semiconductor Ltd. (Nasdaq: TSEM, TASE: TSEM), a pure-play independent specialty foundry, today announced that Synopsys' Hercules(TM) Physical Verification Suite (PVS) rule...
Read More »Interface IP suits DDR2 SDRAM subsystems.
DesignWare-® DDR2 SDRAM system-level interface IP helps ensure overall memory system performance of up to 800 Mbps by delivering complete DDR2 SDRAM memory interface solution that includes scalable digital controller, complete integrated physical interface hard macro, and matching verification IP. Latter provides full support for VCS-® Native Testbench. Solution is designed to operate across...
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