Synopsys, Inc.

Software

Synopsys Enables First-Pass Silicon Success of High Performance NSITEXE Data Flow Processor-based SoC Test Chip for Autonomous Driving

NSITEXE Adopts Synopsys Design, Verification and IP Solutions to Accelerate the Development of New Processor Chip MOUNTAIN VIEW, Calif., Sept. 3, 2019 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that NSITEXE, Inc. achieved success with its first silicon for Data Flow Processor (DFP)-based SoC test chip by using Synopsys design, verification and IP solutions. The DFP has a...

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Samsung Accelerates New Product Ramp for 7nm Technology Node Using Synopsys' Yield Explorer
Software

Samsung Accelerates New Product Ramp for 7nm Technology Node Using Synopsys' Yield Explorer

Comprehensive Yield Learning Platform from Synopsys Enables Close Collaboration with Samsung and Its Fabless Customers During Production Ramp-up of New Products MOUNTAIN VIEW, California, Aug 7, 2019 /PRNewswire/ -- Highlights: Collaboration between Samsung and Synopsys results in fast product ramp for 10/8/7nm products and establishes a foundation for yield learning for 5/4/3nm technology...

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New IC Compiler II for Complex Next-generation Designs
Software

New IC Compiler II for Complex Next-generation Designs

Provides ten percent total power reduction, five percent smaller area, five percent better timing and 2X faster runtime. Delivers QoR and TTR for various markets including automotive, cloud computing, AI, networking and wireless applications. Arc-based unified CCD optimization, physically-aware logic re-synthesis and dynamic voltage drop-driven power shaping.

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Synopsys Design and Verification Solutions Enable Astera Labs to Develop Industry's First PCIe 5.0 Retimer SoC
Software

Synopsys Design and Verification Solutions Enable Astera Labs to Develop Industry's First PCIe 5.0 Retimer SoC

Industry's First Full-chip Implementation and Verification Completed Entirely on Amazon Web Services Cloud Mountain View, Calif., May 30, 2019 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that Astera Labs successfully utilized Synopsys' Fusion Design Platform™, Verification Continuum™ Platform, and Design Services to develop its breakthrough connectivity...

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Laboratory and Research Supplies and Equipment

New ZeBu Power Analyzer Solution Analyze Power Issues Using RTL and Gate-level Flows

Supports emulation efficiency by reusing emulation results when analyzing power for different gate-level implementations. Allows SoC design teams to analyze power usage of their designs when executing billion-cycle, complex software applications. Integrates with synopsys PrimePower power signoff flow, enabling design teams to accurately pinpoint and fix power issues.

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Synopsys' ARC EV6x Vision Processor IP Named Best Processor of the Year by the Embedded Vision Alliance
Computer Hardware & Peripherals

Synopsys' ARC EV6x Vision Processor IP Named Best Processor of the Year by the Embedded Vision Alliance

ASIL D Ready Vision Processor with Safety Enhancement Delivers Highest Level of Functional Safety for Automotive SoCs Mountain View, Calif., May 21, 2019 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that its DesignWare® ARC® EV6x Vision Processor IP with Safety Enhancement Package (SEP) was named "Best Processor" by the Embedded Vision Alliance as part of its annual...

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Software

Synopsys Achieves More than 250 Design Wins with DesignWare IP on TSMC 7nm FinFET Process

Proven Interface, Analog, and Foundation IP Has Enabled Customer Silicon Successes Across a Range of Applications Mountain View, Calif., May 6, 2019 /PRNewswire/ -- Highlights: Silicon-proven DesignWare PHY IP on TSMC's 7nm FinFET process includes USB, DDR, LPDDR, HBM, PCI Express, MIPI, DisplayPort, and Ethernet Successful customer tapeouts of DesignWare Logic Libraries and Embedded...

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