Synopsys, Inc.

Materials

Synopsys and ARM Announce Immediate Availability of CCS Noise Models for ARM Physical IP

Next-Generation Signal Integrity Sign-off Models to Deliver Improved Accuracy and Reduced Turnaround Time MOUNTAIN VIEW, Calif. and CAMBRIDGE, England, Oct. 4 // -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software and ARM [; (NASDAQ:ARMHY)], today announced that the ARMÂ-® Advantage(TM), Metro(TM) and SAGE-X(TM) standard cell libraries, part of its ArtisanÂ-®...

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Software

Synopsys Triples Automatic Test Pattern Generation Performance for TetraMAX Test Tool

Second Consecutive Runtime Improvement for TetraMAX Tool Offers Designers Substantial Productivity Benefits MOUNTAIN VIEW, Calif., Sept. 27 / -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, today announced enhancements to its TetraMAXÂ-® automatic test pattern generation (ATPG) product that result in a typical speedup of three times (3x) or more in runtime...

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Architectural & Civil Engineering Products

Platform enables designers to test and debug SoCs.

Sitka evaluation and development platform for DesignWareÂ-® PCI ExpressÂ-® (PCIe) IP functions as standard PCIe add-in card with support for up to 8 PCIe lanes. Interoperability testing can be performed between SoC design and PCIe PHY, and SoC can be synthesized into 2 on-board Xilinx Virtex(TM)-4 FPGAs. Built-in Xilinx Rocket I/O(TM) SERDES connects directly to the Sitka PCIe interface...

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Software

EDA Software aids in the development of SoCs.

DesignWareÂ-® Verification IP for Open Core Protocol (OCP) interface v2.1 enables verification of OCP cores, OCP systems, and mixed OCP/AMBA systems to their external interfaces. Compliance with VMM methodology defined in Verification Methodology Manual for SystemVerilog enables integration with constrained-random, coverage-driven environments. System supports Verilog and VHDL testbenches, as...

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Controls & Controllers

Intellectual Property Devices support 130 nm technology.

Supporting USB, PCIe, SATA, and XAUI, DesignWare mixed-signal PHY IPs are complex, process-tuned analog interfaces used in highly integrated mobile terminals, home entertainment, computing, storage, and networking applications. Architecture makes units insensitive to process, voltage, and temperature variations. On-board diagnostics on PCI Express, SATA, and XAUI PHYs enable at-speed production...

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Software

Software helps correct and modify designs before tapeout.

Built for 65 nm and smaller technology nodes, PrimeYield integrates design with manufacturing by predicting design-induced mechanisms that threaten manufacturing tolerances and by providing automated correction guidance to design implementation tools. Program includes critical area analysis; lithography compliance checking, which flags potential lithographical errors and process-variation effects...

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Software

Semiconductor Software addresses variation-aware design.

Design-for-manufacturing (DFM) solution suite, which includes PrimeTimeÂ-® static timing analysis and Star-RCXT(TM) extraction tools, brings statistical analysis to timing sign-off solution. Suited for 65 nm and below IC design, semiconductor design software variation-aware analysis solution consists of 3 parts: Liberty(TM) Composite Current Source modeling technology, Star-RCXT VX for...

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Software

Software automatically corrects lithography problems.

As tool suite for design-yield analysis, PrimeYield enables automated correction of manufacturing problems early in design process. It integrates design with manufacturing by predicting design-induced mechanisms that threaten yield and providing automated correction guidance to design implementation tools. Lithography compliance-checking (LCC) module links to IC Compiler, enabling detection and...

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Software

EDA Software provides place-and-route solution.

Utilizing technologies from JupiterXT(TM) tool, IC Compiler 2006.06 allows flat floorplan creation and refinement in same environment as physical implementation. Integration brings about commonality in GUI, timing analysis, placement, and global routing technologies to optimize floorplanning and speed time to results. Program includes advances in physical test, low-power design, true concurrent...

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Software

Synopsys Extends Liberty Modeling Standard to Enable Variation-Aware Design

Variation-based Models Built on Proven Composite Current Source Technology to Deliver Improved Accuracy MOUNTAIN VIEW, Calif., Aug. 2 // -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, today announced new extensions to the Liberty(TM) library format, the de-facto open- source modeling standard for integrated circuit (IC) implementation and signoff. The new...

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