Synopsys, Inc.
Mountain View, CA 94043
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New Simpleware ScanIP Medical Enables Conversion of 3D Scan Data into High-quality Computer Models
Obtains CE marking in EEA, FDA 510(k) cleared and developed using an ISO 13485:2016 quality management system. Used as a software interface and image segmentation system as well as pre-operative software for simulating/evaluating surgical treatment options. Applicable in the life sciences, consumer products, aerospace, automotive, defense, oil and gas industries.
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FABU Technology Selects Synopsys' DesignWare IP Portfolio to Deliver Intelligence in ADAS and Autonomous Driving SoCs
Portfolio of Silicon-Proven IP Meets Artificial Intelligence Processing, Memory, Connectivity, and Security Requirements while Accelerating Automotive Functional Safety Assessments Mountain View, California and Tempe, Arizona, Feb. 4, 2019/PRNewswire/ -- Synopsys, Inc. (NASDAQ: SNPS) and FABU Technology Co., Ltd. today announced that FABU has selected a portfolio of silicon-proven Synopsys...
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Synopsys Introduces ARC EM Software Development Platform with an External Bus Interface
The DesignWare® ARC® EM Software Development Platform consists of hardware and software configuration information for speeding software development and debugging. The product comes with peripheral interfaces such as USB, SD card, Bluetooth, WiFi and 9D motion sensor digital microphone input. It provides online access to device drivers, examples and open-source software. The platform supports...
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Synopsys Introduces Fusion Compiler That is Designed for RTL-to-GDSII Implementation
The Fusion Compiler™ combines high-capacity synthesis technology and an IC Compiler™ II route technology. The compiler is built-on single data model that supports common signoff analysis, optimization, concurrent clock data optimization, clock topology creation, and routing engines. This compiler is suitable for the design of FinFET-based automotive applications.
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New Design Compiler NXT Features Latest RTL Synthesis Innovations
Design Compiler NXT delivers 2X faster runtimes, improved QoR, and tight RC and timing with IC Compiler II. It is a plug-and-play, UI- and script-compatible with Design Compiler Graphical.
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Latest DesignWare STAR Memory System Comes with Enhanced Design Acceleration Scripts
The DesignWare STAR Memory System is embedded with suite of test, repair, and diagnostic capabilities for optimizing MRAM test time. The system is offered with new algorithms that target failure mechanisms of embedded MRAM. It supports multiple background patterns and complex addressing modes and accelerates the ATE vector generation. The STAR Memory System is able to test, diagnose, and debug a...
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Synopsys Introduces the LPDDR5 Controller to Provide Memory Interface IP Solutions for SoC Designs
The LPDDR5 is designed to increase memory interface bandwidth. The product features low-power states with short exit latencies, multiple pre-trained states for dynamic frequency change capabilities, and decision feedback equalization. Synopsys’ LPDDR5 has applications for AI, automotive and the cloud.
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Latest Custom Compiler Custom Design Tool is Now Available with Visually-Assisted Automation
Synopsys offers the Custom Compiler™ Custom Design Tool version 2018.09 with performance improvements and enhancements that reduce the time to design closure for custom IC design. The tool is now added with Extraction Fusion and DRC Fusion with IC validator. The compiler’s visually-assisted automation technology automates custom layout tasks and the template assistant provides the ability to...
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New FineSim SPICE Circuit Simulation Software Comes with Extraction Fusion and DRC Fusion Technologies
The FineSim SPICE Circuit Simulation Software is embedded with RF analysis features, StarRC and IC validator. The software enables tighter design/layout collaboration and fewer late-stage design iterations. It comes with custom layout editor with advanced technologies for parasitic extraction, reliability analysis, and physical verification. The visually-assisted automation of the software is...
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Synopsys Releases New Platform Architect Ultra for Cloud and Edge Applications
The Platform Architect™ Ultra Architecture Exploration, Analysis and Design Solution comes with AI reference system that enables integration, analysis and optimization of CNN workload models. This software maps CNN algorithms and workloads to explore processing and memory architecture options. It allows architects to analyze, select, optimize, and tune algorithms and architectures. The...
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