Synopsys, Inc.
Mountain View, CA 94043
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Optical Design Software optimizes beam propagation analysis.
Suitable for evaluating microlithography lenses, laser scanning systems, and optical telecommunication devices, CODE V-® v10.4 includes Beam Synthesis Propagation (BSP) tool, which uses beamlet-based algorithms to produce physically accurate model of wave nature of light as it travels through optical system. BSP accounts for aberrations and diffraction effects, supports parallel processing on...
Read More »EDA Software povides volume diagnosis to improve yields.
TetraMAX ATPG identifies potential defects from scan test failures, using physical design data for diagnostic accuracy, while Yield Explorer analyzes these potential defects across multiple failing devices to reveal systematic yield issues. It also uses design data to identify specific yield-limiting layout geometries. Together, solutions automate flow and help ensure optimized throughput via...
Read More »Virtual Prototyping Software speeds SoC software development.
Designed to address development challenges associated with software-rich semiconductor and electronic products, Virtualizer Tool Set enables companies to accelerate development of virtual prototypes and deployment of prototypes to software teams throughout design chain. Graphical design entry, software debug, and analysis components combined with system-level models accelerate time to prototype...
Read More »Synopsys and GLOBALFOUNDRIES Collaborate to Deliver Interoperable Process Design Kits (iPDKs)
Synopsys Custom Design Solution Now Supported by GLOBALFOUNDRIES 65nm Process Technologies MOUNTAIN VIEW, Calif. - Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has collaborated with GLOBALFOUNDRIES to jointly develop, validate, support and distribute interoperable process design kits (iPDKs) for...
Read More »IC Compiler Software supports double-patterning technology.
Built on Zroute technology, IC Compiler-Advanced Geometry targets design support for double-patterning technology, which is required for next generation of silicon technology at 20 nm and imposes strict constraints on placement, routing, and physical verification. Program includes technology to formulate double patterning requirements as generalized coloring problem, avoiding potential conflicts...
Read More »Non-Volatile Memory IP supports 180 nm CMOS process technology.
Available for multiple 180 nm process technologies, DesignWare-® AEON-® Non-Volatile Memory (NVM) IP products include few-time programmable (FTP), multiple-time programmable (MTP) RFID, and EEPROM IP solutions. No high-voltage generation circuitry is required; all programming and re-programming is done using standard CMOS technology with no additional masks or process adaption. Products support...
Read More »ARM and Synopsys Sign Multi-Year EDA Tools and ARM® Cortex(TM)-A15 Access Agreements
Agreements Aim to Maximize System-on-Chip (SoC) Performance and Energy Efficiency while Shortening Development Time CAMBRIDGE, United Kingdom and MOUNTAIN VIEW, Calif., Highlights o Synopsys and ARM have signed a multi-year expanded EDA tools agreement providing ARM engineering teams extended access to Synopsys' leading-edge EDA technology. o ARM will also provide Synopsys with access to ARM...
Read More »Synopsys and TSMC Collaborate to Deliver Custom Design Solution for 28nm Analog/Mixed-Signal Reference Flow 2.0
Synopsys Galaxy Custom Designer Provides New Capabilities to Address Advanced Process Node Design Challenges Highlights: o Parasitic-aware capability reduces the number of late-stage design and layout iterations o The Layout Dependent Effect (LDE)-aware capability helps to shrink long layout cycles caused by unexpected device interactions MOUNTAIN VIEW, Calif., June 2, 2011 - Synopsys, Inc....
Read More »Synopsys Delivers 28-nm Design Solutions and Advanced System-Level Capabilities for TSMC Reference Flow 12.0
Flow provides optimized methodologies to shorten time-to-market and time-to-volume for designers using TSMC's 28-nanometer process technology MOUNTAIN VIEW, Calif. - Highlights: o Synopsys provides comprehensive support for TSMC's 28-nanometer (nm) technology for manufacturing compliance from physical design through to signoff. o Synopsys' Virtual Prototyping, as a part of TSMC's silicon design...
Read More »Latest Innovations in Synopsys IC Compiler Deliver up to 40 Percent Power Reduction at HiSilicon
IC Compiler Widely Deployed In HiSilicon Production Design Flow MOUNTAIN VIEW, Calif. - Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that HiSilicon, a leading fabless semiconductor house supplying end-to-end ASIC solutions for communications networking and digital media markets, has reduced stand-by...
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