Synopsys, Inc.
Mountain View, CA 94043
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Illumination Design Software provides polarization analysis.
Supporting 3D textures on curved surfaces, LightTools-® v8.2 enables designers to maximize light extraction and control scattering of light in wide range of applications, including complex light pipes and non-planar backlights. Unified Glare Rating utility calculates UGR and allows designers to optimize luminaires to automatically improve glare rating. With polarization analysis, software...
Read More »IC Compiler supports 10 nm process technology.
Built on multi-everything infrastructure, IC Compiler™ II 2014.12 combines ultra-high capacity design planning and advanced global analytical closure techniques. Production-ready netlist-to-GDSII implementation system delivers multi-objective concurrent clock and data for pre- and post-route optimization, as well as advanced low-power optimization techniques, electro-migration analysis, and...
Read More »Oticon Standardizes on Synopsys' Design Compiler Graphical
Reduced Congestion and MCMM Synthesis Cut Weeks from Schedule MOUNTAIN VIEW, Calif. Highlights: • Oticon has widely deployed Design Compiler Graphical for implementation of its hearing solutions ICs • Multi-corner multi-mode (MCMM) synthesis results in lower leakage and faster convergence • Congestion reduction in Design Compiler Graphical enables Oticon to achieve faster design performance...
Read More »Optical Design Software provides visualization and analysis.
With Image Simulation feature, CODE V v10.7 helps visualize and communicate optical performance results. Feature supports mapping functions, including those that allow analysis of systems with hyper-hemispherical fields of view. Ray tracing algorithm accelerates- analysis of precision optical systems, while charts for user tolerancing and fast wavefront differential tolerancing optimize...
Read More »Nitero Achieves First-Pass Silicon Success for Industry's First Mobile 60GHz SoC Using Synopsys DesignWare IP for PCI Express and Tools
High-Quality DesignWare IP, Verification IP and Galaxy Design Platform Tools Deliver Lower Power, Smaller Area and Faster Time-to-Market for Wi-Fi Networking SoC MOUNTAIN VIEW, Calif. — Highlights: • Nitero achieved first-pass silicon success for industry's first 60GHz Wi-Fi SoC using Synopsys DesignWare IP for PCI Express technology, Verification IP and Design Compiler and PrimeTime design...
Read More »KYOCERA Document Solutions Uses Synopsys' Application-Specific Instruction-Set Processor Tool to Accelerate Design of High-Performance Image Processing DSP
Processor Designer Tool Enables KYOCERA Design Team to Reduce Overall Project Schedule by Nine Months MOUNTAIN VIEW, Calif. — Highlights: • Synopsys' ASIP design tools enable rapid exploration and optimization of processor architectures • KYOCERA created a custom high-performance DSP in less than a year, saving an estimated nine months on their project schedule • Automated creation of...
Read More »Non-Volatile Memory IP is available for TowerJazz process.
Suited for precision analog IC trimming and sensor calibration applications, DesignWare-® AEON-® Few Time Programmable (FTP) Trim Non-Volatile Memory (NVM) IP for TowerJazz 180 nm SL process technology integrates high voltage generation and control circuitry using standard CMOS technology. IP operates from single core supply, and reprogrammability enables designers to make in-field calibration...
Read More »Synopsys IC Compiler II Delivers Five Fold Implementation Speed up, Enables Silicon Success
Success Drives Panasonic SoC Adoption of IC Compiler II MOUNTAIN VIEW, Calif. - Highlights - - - --- IC Compiler II enables first-time working silicon for high-performance - - - - - - - multimedia design in 40-nm technology - - - --- 5X faster design implementation enables faster turn-around-time for - - - - - - - large partitions - - - --- Ability to seamlessly...
Read More »EDA Software enables on-chip embedded Flash test/repair.
Available for UMC's 55 nm process, DesignWare-® STAR Memory System-® for Embedded Flash offers automated pre- and post-silicon memory test, diagnostic, and repair solution that helps designers improve test coverage, reduce design time, and maximize manufacturing yield. Integrated built-in self-test (BIST) solution includes test algorithms optimized for on-chip embedded flash memories....
Read More »Synopsys STAR Memory System Multi-Memory Bus Processor Enables 10 Percent Die Size Reduction for Marvell SoC
New Multi-Memory Bus Processor Cuts Test Logic in Half While Maintaining High Performance for Networking SoC MOUNTAIN VIEW, Calif. Highlights: • Marvell achieved silicon success for networking SoC using the multi-memory bus (MMB) processor in the Synopsys DesignWare STAR Memory System for embedded test and repair -- Reduced area and power with a single MMB processor providing common test and...
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