Mountain View, CA 94043
Synopsys Accelerates Development of Safety-Critical Products with Design Solutions for ARM Cortex-R52
Synopsys Tools Enable Design and Safety Certification of Automotive, Industrial and Health Care SoCs Based on New ARMv8-R Architecture CPU MOUNTAIN VIEW, Calif. - Highlights: Galaxy Design Platform tools, including IC Compiler II place and route, Design Compiler Graphical synthesis, and ISO 26262-certified TetraMAX II ATPG enable optimal power, performance and area for ARM Cortex-R52 designs...Read More »
Device Controller IP comply with DSI v1.2 and CSI-2 v1.2 specs.
Respectively supporting up to- 8 and- 4 lanes of operation, DesignWare-® MIPI-® CSI-2SM Device Controller IP and DesignWare MIPI DSISM Device Controller IP let designers implement required camera and display functionality in mobile, automotive, and IoT applications. Both device controllers, interoperable with DesignWare MIPI D-PHY v1.2 operating at 2.5 Gbps/lane, offer integrated debug and...Read More »
Synopsys TetraMAX II Speeds Test Generation for STMicroelectronics SoC Designs
New ATPG Engines Substantially Reduce Test Pattern Count for Lower Test Cost MOUNTAIN VIEW, Calif. - Highlights: Evaluation of TetraMAX II demonstrated an order of magnitude speedup in runtime Achieves significant test-pattern-count reduction without impacting test coverage Synopsys, Inc. (Nasdaq: SNPS), today announced that STMicroelectronics is seeing significantly faster test pattern...Read More »
Synopsys TetraMAX II ATPG Certified for ISO 26262 Automotive Functional Safety
Independent Functional Safety Evaluation Provides Highest Level of Safety-Related Tool Confidence MOUNTAIN VIEW, Calif. - Highlights: Tool certification accelerates ISO 26262 functional safety qualification for automotive ICs up to the most stringent safety requirements for ASIL D Enables automotive IC design teams to accelerate their manufacturing test development process with 10X faster run...Read More »
Test Pattern Generator cuts ATPG runtime from days to hours.
Built on test generation, fault simulation, and diagnosis engines that are extremely fast, TetraMAX-® II ensures patterns are ready when early silicon samples are first available for testing. Pattern reduction enables designers to shorten time of testing, while memory efficiency enables utilization of all server cores regardless of design size. Reuse of design modeling and rule checking...Read More »
SMIC and Synopsys Deliver 28-nm HKMG Low-Power Reference Flow
Collaboration Delivers Best-In-Class Power, Performance and Area with IC Compiler II MOUNTAIN VIEW, Calif. and SHANGHAI - Highlights: - - - --- Technology advancements in the latest release of IC Compiler II deliver - - - - - - - exceptional quality-of-results across all key metrics: Better - - - - - - - performance, smaller area and lower power - - - --- Speeds design...Read More »
Synopsys' SpyGlass Solution Delivers Critical Technology to Enable Compliance with DO-254 Aviation Safety Standard
MOUNTAIN VIEW, Calif. - Synopsys, Inc. (Nasdaq:SNPS) today announced the availability of key technology required by airborne electronic hardware (AEH) system-on-chip (SoC) teams for compliance with the DO-254 standard.- The DO-254 standard is used to ensure the highest level of safety in AEH designs for airborne applications.- Built upon the industry's leading Synopsys SpyGlass-® RTL Signoff...Read More »
Embedded Vision Processors support 1080p to 4K resolutions.
Integrating 1, 2, and 4 vision CPU cores, respectively, DesignWare-® EV61, EV62, and EV64 address high throughput applications such as ADAS, video surveillance, and virtual/augmented reality. Programmable convolution neural network engine, delivering scalable performance to 800 MACs/cycle and supporting image resolutions up to 4K, operates in parallel with CPUs for object detection, image...Read More »
Controller IP targets mobile, automotive, IoT applications.
Compliant with MIPI-® CCI, I-²C, and MIPI I-³C specifications, DesignWare-®- MIPI I3CSM facilitates integration of multiple sensors into applications. Master and slave operating mode support enables systems with several ICs to connect to all sensors on one I-³C bus, while in-band interrupts incorporated within 2-wire interface- minimize pin count. Solution supports data rates up to 26.7...Read More »
Synopsys Redefines Circuit Simulation with Native Environment
Eliminates Need for Third-party Environment, Accelerates Analog Verification MOUNTAIN VIEW, Calif. - Highlights: - - - --- HSPICE, FineSim and CustomSim 2016.03 release to include native - - - - - - - environment for analog verification - - - --- Eliminates the need for third-party analog design environments - - - --- Streamlines multi-testbench, multi-corner simulation...Read More »