Synopsys, Inc.

Latest Virtualizer Development Kit is Ideal for Automotive Companies
Software

Latest Virtualizer Development Kit is Ideal for Automotive Companies

Supports Infineon's AURIX TC4xx 32-bit microcontroller with parallel processing unit. Enables early investigation and testing of algorithm implementations for AI and deep learning solutions. Provides external communication, co-simulation and debug/test interfaces for software debugging, virtual hardware-in-the-loop testing, and calibration and fault testing.

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Software

Synopsys Demonstrates Industry's First PCI Express 5.0 IP Interoperability with Intel's Future Xeon Scalable Processor

Successful Interoperability Enables Low-Risk Integration and Broad Adoption of the PCIe 5.0 Interface in High-Performance Computing SoCs MOUNTAIN VIEW, Calif., Oct. 13, 2020 /PRNewswire/ -- Highlights: Interoperability establishes end-to-end 32GT/s PCIe 5.0 link between DesignWare IP for PCI Express 5.0 Complete Solution and future Intel Xeon Scalable processors The DesignWare IP for PCI...

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Computer Hardware & Peripherals

New EM22FS Functional Safety Processor IP is ISO 26262 ASIL D Compliant

Offers integrated safety-critical hardware features such as dual-core lockstep, error-correcting code, and safety monitors, facilitate chip-level safety certification. Includes comprehensive safety documents such as failure modes, effects and diagnostic analysis (FMEDA), Safety Manual, Safety Case Report, ISO 26262 Functional Safety Assessment Report, and other safety-related documents. Developed...

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Synopsys ASIP Designer Tool has Ability to Export Processor's Simulation Model with SystemC Interfaces
Software

Synopsys ASIP Designer Tool has Ability to Export Processor's Simulation Model with SystemC Interfaces

ASIP Designer helps NSITEXE to optimize the processors multicore architecture and automatically generate software development kits. Allowed NSITEXE to specify the desired processor architecture in a high-level language at the abstraction level of a programmer's manual. Automatically configures the SDK containing a cycle-accurate instruction-set simulator, assembler, linker, debugger and C/C++...

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Software

Synopsys and Nestwave Collaborate to Develop a Low-power Geolocation IP Solution for IoT Modems

Combination of Synopsys' ARC IoT Communications IP Subsystem with Nestwave's Geolocation IP Eliminates the Need for a Dedicated Positioning Chipset Highlights: Nestwave's low-power geolocation solution incorporates Synopsys DesignWare ARC IoT Communications IP Subsystem with integrated ARC EM9D Processor IP ARC EM9D processor and custom instruction extensions provide performance...

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Software

New Integrated Solution Leverages Virtual Prototyping Technologies Including Virtualizer, Silver, TestWeaver and SaberRD

Support the needs of EV design which includes EV model libraries for power electronic, microcontrollers and AUTOSAR components. Enables more productive development and rapid scaling of test activities by removing the dependency on a physical hardware set up. Includes debug, analysis and test functionality to support functional safety, HW/SW debug, variation analysis, coverage analysis and...

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New JEDEC DDR5 Verification IP Uses Next-generation Native SystemVerilog UVM Architecture
Electrical Equipment & Systems

New JEDEC DDR5 Verification IP Uses Next-generation Native SystemVerilog UVM Architecture

Enables design and verification of next-generation memory devices with ease-of-use, fast integration and optimum performance, resulting in accelerated verification closure. Operates at up to 6400 Mb/s support key features of DDR5 standard including device size, burst length, DIMM topologies and RAS features. Ideal for broad range of enterprise applications including cloud, IoT, high-performance...

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New Design and Visualization Workflow Solution Features Photorealistic Renderings
Software

New Design and Visualization Workflow Solution Features Photorealistic Renderings

LucidShape CAA V5 enable designers to conceptualize and design automotive lighting products as well as generates physics-based photorealistic images. Help designers to create light guide designs fast, optimize light distributions and uniformity and achieve good as-built performance. Allow users to construct and simulate design variations fast as well as streamlines the creation of multiple design...

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Software

New DesignWare USB4 IP Solution Operates at up to 40 Gbps

Supports multiple high-speed interface protocols including USB4, displayPort 1.4a TX, PCI express and thunderbolt 3 for efficient data transfer and simultaneous delivery of data, power and high-resolution video. Designed to meet functionality, power and area requirements of a broad range of storage, PC and tablet SoC designs as well as software development debug. USB4 PHY IP offers a high...

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Latest Virtualizer Development Kit is Ideal for Automotive Companies
Software

Latest Virtualizer Development Kit is Ideal for Automotive Companies

Supports Infineon's AURIX TC4xx 32-bit microcontroller with parallel processing unit. Enables early investigation and testing of algorithm implementations for AI and deep learning solutions. Provides external communication, co-simulation and debug/test interfaces for software debugging, virtual hardware-in-the-loop testing, and calibration and fault testing.

Read More »
Company News

TSMC Recognizes Synopsys Collaboration with Four OIP Partner of The Year Awards for IP and EDA Solutions

Highlights: Synopsys selected as TSMC OIP Partner of the Year for interface IP and tool enablement for the 10th consecutive year Collaborations on interface IP, joint development of 3nm design infrastructure, 3DIC design productivity solution and a highly scalable timing sign-off in the cloud are recognized Mountain View, Calif., Oct. 20, 2020 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS)...

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Company News

Synopsys and Samsung Foundry Announce Reference Flow for Predictable Execution of ASIL D-Compliant SoC Design for Automotive Applications

Comprehensive Flow Implements Synopsys' Functional Safety Processor IP for Efficient Development of Autonomous Driving and ADAS SoCs MOUNTAIN VIEW, Calif., Oct. 14, 2020 /PRNewswire/ -- Highlights: Samsung Foundry and Synopsys' optimized flow achieves predictable execution of in-system test, implementation, verification, timing and physical signoff for ASIL D-compliant SoC design...

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Software

Synopsys Demonstrates Industry's First PCI Express 5.0 IP Interoperability with Intel's Future Xeon Scalable Processor

Successful Interoperability Enables Low-Risk Integration and Broad Adoption of the PCIe 5.0 Interface in High-Performance Computing SoCs MOUNTAIN VIEW, Calif., Oct. 13, 2020 /PRNewswire/ -- Highlights: Interoperability establishes end-to-end 32GT/s PCIe 5.0 link between DesignWare IP for PCI Express 5.0 Complete Solution and future Intel Xeon Scalable processors The DesignWare IP for PCI...

Read More »
Computer Hardware & Peripherals

New EM22FS Functional Safety Processor IP is ISO 26262 ASIL D Compliant

Offers integrated safety-critical hardware features such as dual-core lockstep, error-correcting code, and safety monitors, facilitate chip-level safety certification. Includes comprehensive safety documents such as failure modes, effects and diagnostic analysis (FMEDA), Safety Manual, Safety Case Report, ISO 26262 Functional Safety Assessment Report, and other safety-related documents. Developed...

Read More »
Company News

Synopsys and GLOBALFOUNDRIES Collaborate to Develop Broad Portfolio of DesignWare IP for 12LP+ FinFET Solution

DesignWare IP Delivers Significant Performance and Power Advantages for Cloud Computing and Edge AI SoCs on GF 12LP+ Solution MOUNTAIN VIEW, Calif., Sept. 24, 2020 /PRNewswire/ -- Highlights: DesignWare IP portfolio for GF 12LP+ solution includes USB4, PCIe 5.0, Die-to-Die HBI and 112G USR/XSR, 112G Ethernet, DDR5, LPDDR5, MIPI, OTP NVM and more Long-standing collaboration between the two...

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Synopsys ASIP Designer Tool has Ability to Export Processor's Simulation Model with SystemC Interfaces
Software

Synopsys ASIP Designer Tool has Ability to Export Processor's Simulation Model with SystemC Interfaces

ASIP Designer helps NSITEXE to optimize the processors multicore architecture and automatically generate software development kits. Allowed NSITEXE to specify the desired processor architecture in a high-level language at the abstraction level of a programmer's manual. Automatically configures the SDK containing a cycle-accurate instruction-set simulator, assembler, linker, debugger and C/C++...

Read More »
Software

Synopsys and Nestwave Collaborate to Develop a Low-power Geolocation IP Solution for IoT Modems

Combination of Synopsys' ARC IoT Communications IP Subsystem with Nestwave's Geolocation IP Eliminates the Need for a Dedicated Positioning Chipset Highlights: Nestwave's low-power geolocation solution incorporates Synopsys DesignWare ARC IoT Communications IP Subsystem with integrated ARC EM9D Processor IP ARC EM9D processor and custom instruction extensions provide performance...

Read More »
Software

New Integrated Solution Leverages Virtual Prototyping Technologies Including Virtualizer, Silver, TestWeaver and SaberRD

Support the needs of EV design which includes EV model libraries for power electronic, microcontrollers and AUTOSAR components. Enables more productive development and rapid scaling of test activities by removing the dependency on a physical hardware set up. Includes debug, analysis and test functionality to support functional safety, HW/SW debug, variation analysis, coverage analysis and...

Read More »

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