Altera Corp.
San Jose, CA 95134
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FFT IP Core is suited for FPGA co-processors.
Fully integrated fast Fourier transfer (FFT) IP core, FFT MegaCoreÃ-® Function 2.0, enables system designers to off-load computationally intensive FFT functions to FPGA co-processor. It delivers up to 16 K points of resolution as well as max clock frequency in excess of 300 MHz. IP core, comprised of FFT, data RAM, and twiddle ROM, includes IP toolbench GUI and quad-output Radix 4 FFT engine...
Read More »CPLDs offer embedded flash memory.
With instant-on, single-chip, non-volatile characteristics, MAXÃ-® II complex programmable logic devices (CPLDs) range in density from 240-2,200 logic elements (LEs). Look-up table-based architecture is manufactured on TSMC's 0.18 micron embedded flash process and utilizes staggered ring of I/O pads. Features include real-time ISP and Quartus II v4.0 software support.
Read More »Software supports Stratix II FPGA design.
Quartus II v4.0 features TCL scripting interface, which lets designers mix-and-match between GUI and scripting design techniques. Memory compiler waveform generator graphically supports what-if analysis by producing waveform displays of memory structure operation. SOPC Builder tool supports IP-based design without requiring lower-level HDL or schematics. Software offers multi-clock timing...
Read More »FPGAs feature adaptable architecture.
Optimized for 90-nm process, Stratix(TM) II FPGAs provide up to 384 18-bit x 18-bit multipliers per device, while supporting 370 MHz performance for high-bandwidth parallel processing. SERDES and DPA circuitry enables 1 Gbps source-synchronous I/O performance without consuming logic resources. Units include AES-based, non-volatile 128-bit encryption technology and up to 9 Mbits of memory with...
Read More »Software aids in FPGA research and development.
QuartusÃ-® II University Interface Program (QUIP) toolkit helps researchers work with Quartus II design software. Featuring documentation, tutorials, data files, and sample code, software provides users with resources for conducting FPGA research. Tool suite provides full access to Stratix(TM) architecture information and supports series of interfaces to Quartus II software. It enables...
Read More »FPGAs offer digital signal processing speeds to 333 MHz.
Stratix(TM) FPGA models EP1S80 and EP1S60, available with 79,040 and 57,120 logic elements, respectively, are available in -5 speed grade to DSP speeds to 333 MHz and data rates to 300 MHz. Built on 0.13-micron, all-layer copper process, devices provide up to 22 embedded DSP blocks, which consist of hardware multipliers, adders/subtractors, accumulators, and pipeline registers. They offer...
Read More »High-Density FPGAs offer design flexibility.
Industrial-grade Stratix(TM) FPGAs, models EP1S80 and EP1S60, promote design flexibility in military, aerospace, and industrial systems. Model EP1S80 provides 79,000+ logic elements and 7+ Mbits of internal memory. Offered in industrial (-40 to +100Ã-ºC) and extended temperature (-40 to +125Ã-ºC) versions, Stratix devices are built on 0.13 micron, all-layer copper process. They feature...
Read More »Gate Array suits high volume applications.
Field Programmable Gate Array, Cyclone(TM) Model EP1C4, offers up to 301 I/O pins and 4,000 logic elements. Built on 0.13 micron, all-layer copper process, unit includes embedded RAM blocks and is intended to facilitate use of FPGA technology by designers developing volume-driven applications in communications, industrial, consumer, computing, and automotive markets. It is specified for -40 to...
Read More »Software Development Kit accelerates creation of embedded designs.
NiosÃ-® Development Kit, Stratix(TM) Professional Edition includes Nios embedded processor v3.02, and Stratix EP1S40 device, which delivers more than 40,000 logic elements and over 3 Mbits of on-chip memory. Development board provides 16 Mbytes SDRAM, 1 Mbyte SRAM, 8 Mbytes flash memory, 10/100 Ethernet port, 2 serial ports, and Mictor connector for software trace debug. QuartusÃ-® II...
Read More »Transceiver-Based FPGAs provide 20 high-speed channels.
Combining 3.125 Gbps transceiver technology with fast FPGA architecture, Stratix(TM) GX EP1SGX40G and Stratix GX EP1SGX40D FPGAs deliver 20 and 8 high-speed transceiver channels, respectively. Former can also deliver 45 channels of embedded dynamic phase alignment (DPA) that support 1 Gbps source-synchronous communication. Based on 0.13 micron process technology, with 1.5 V core voltage, products...
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