Altera Corp.
San Jose, CA 95134
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FPGA features embedded dynamic phase alignment circuitry.
Stratix(TM) GX Field Programmable Gate Array enables up to 1 Gbps SPI-4.2 signaling. System Packet Interface protocol specifies minimum 622 Mbps transfer rate on 16-bit data interface. Interfaces between physical layer and link layer devices typically operate at 700-800 Mbps, and interconnect to switch fabric operates at up to 1 Gbps for 10 Gbps line rate applications such as OC-192 packet over...
Read More »Logic Emulation Board is FPGA-based.
Model DN5000k10 accommodates 2-5 Stratix EP1S80 field programmable gate arrays, which provide 79,040 logic elements, 7.4 Mbits of embedded RAM, and 22 digital signal processing blocks. It offers 4 external 512 K x 36 pipelined/flowthrough/zero bus turnaround SSRAM devices and 64 K x 72 DDR SDRAM device to bolster embedded memory. Flexible clocking scheme based on 2 external phase-locked loop...
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