FPGA Device offers alternative to ASSPs and small ASICs.
With 1,280 logic cells and up to 93 user I/O pins, iCE65L01 mobileFPGA(TM) offers alternative to fixed-function application-specific standard products and ASICs. Programmable device addresses functions such as intelligent battery-life management and interrupt offload for battery-operated, handheld products such as eBook readers and SmartBook computers. iCE65L01 is available in VQ100, CB132, and...
Read More »Silicon TVS Arrays provide ESD protection.
Housed in 1.25 x 1.0 x 0.5 mm Â-µDFN package, ±8 kV Model SP1010-04UTG has capacitance of 3.5 pf for high speed buses, while ±15 kV Model SP1011-04UTG offers 7 pF of capacitance for optimized ESD protection. Both 4-channel arrays are RoHS-compliant and suitable for cell phones, smart phones, PDAs, portable navigation devices, digital cameras, netbooks, and portable medical...
Read More »Xilinx Spartan-6 FPGAs Enable PCI Express Compliant System Design for Low-Power, Low-Cost Connectivity Applications
Integrated PCIe FPGA Endpoint Achieves PCI-SIG Compliance for PCI Express 1.1 Single-lane Configurations SAN JOSE, Calif. -- Xilinx (Nasdaq: XLNX) today announced that its low-cost Spartan®-6 FPGA family is compliant with the PCI Express® 1.1 specification, enabling low-risk and low-cost implementation of serial connectivity solutions for consumer, automotive, wireless, and other...
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Data Converter employs Xilinx Virtex-6 FPGA.
Suitable for connection to HF or IF ports for communications, radar, telemetry, and medical systems, Model 71620 features three 200 MHz 16-bit TI ADS5485 A/Ds delivering input bandwidth of 350 MHz, and dual-channel 800 MHz 16-bit TI DAC5688 D/A providing 2 wideband analog outputs. Multichannel XMC module supports Gen 2 PCI Express as primary control and data streaming interface. With lane widths...
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Dry Ice Blasting and Cleaning: Everything You Need to Know
Check out this white paper to learn about the benefits of dry ice blasting.
Read More »Lattice Announces First Low Cost FPGA with Serial Rapidio 2.1 Support
Lowest Cost, Lowest Power Programmable SRIO Solution in the Industry HILLSBORO, OR - Lattice Semiconductor Corporation (NASDAQ: LSCC) and Praesum Communications today announced the availability of the Serial RapidIO 2.1 endpoint soft IP core for the LatticeECP3 FPGA family. The core supports 1x, 2x and 4x lane configurations at up to 3.125Gbps lane speeds, offering the lowest cost, lowest power...
Read More »Low-Power FPGA targets 3G basestation designs.
Featuring DSP capacity of 320 18 x 18 multipliers, 6.8 Mbits of memory, and up to sixteen 3.2 Gbps SERDES channels, LatticeECP3(TM)-150 is suited for complex Wireless Remote Radio Heads such as MIMO-based RF antenna solutions. Device also provides Wireline Access developers with low-power Ethernet, SONET, and PCI Express solutions. FPGA is supported by ispLEVER® v8.0 design suite, which...
Read More »FPGA Series balance power, memory, and DSP capabilities.
Supporting mainstream serial protocols, Cyclone® IV series responds to bandwidth requirements driven by demand for mobile video, voice, and data access. Cyclone IV GX devices, supplied in packages down to 11 x 11 mm, have up to 150K logic elements, up to 6.5 Mbit RAM, 360 multipliers, and 8 integrated 3.125 Gbps transceivers. Cyclone IV E devices offer features suited for power-sensitive...
Read More »FPGAs integrate 11.3 Gbps transceivers.
With 36 transceiver channels operating from 2.488-11.3 Gbps, Stratix® IV GT EP4S100G2 FPGAs meet bandwidth requirements for next-generation framer, MAC, bridging, and switching applications for 100-Gigabit Ethernet and 100-Gigabit Optical Transport Networks. Single-chip devices meet IEEE 802.3 standard for 100G systems and offer jitter performance to meet 10G, 40G, and 100G protocol...
Read More »FPGAs feature up to 820 K logic elements.
Intended for high-end digital applications, 40 nm Stratix® IV E FPGA Series features 4 devices ranging in density from 230 to 820 K logic elements. Model EP4SE820 provides 650 K registers and 23.1 Mbits of 600 MHz embedded memory, as well as 960 18 x 18 multipliers running up to 550 MHz, 1,120 I/Os, and 1.25 Gbps LVDS performance. Devices are suitable for ASIC prototyping and emulation,...
Read More »FPGA features 36 embedded transceivers.
Providing 230 K logic elements, 13.9 Mbits of embedded memory, and 1,288 18 x 18 multipliers, 40 nm Stratix® IV GX EP4SGX230 FPGA is suited for variety of high-speed backplane and cabling interfaces, chip-to-chip interconnects, and protocol-bridging applications. Embedded transceivers offer optimal jitter performance at data rates from 600 Mbps to 8.5 Gbps. They support PCI® Express...
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TPA Motion Introduces New Curved Linear Rail Guides: the CR40 Series
For the ultimate in precision open and closed loop guided motion systems, TPA Motion is the leader in curved rail, liner guides. We specialize in engineering excellence, with products that exhibit an elevated level of precision, delivering robust performance, even under the most challenging conditions. See our video to learn more.
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