Eklin Medical Systems, Inc.
Santa Clara, CA 95054
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Annular Cutter drills into steel.
Every other tooth in HSS High Speed Steel cutter is double beveled, enabling immediate centering for faster, more precise cutting. Thin wall makes cutting faster and more efficient by removing less material. Short flute enables chips to fall freely from cutter. Sizes range from 1/2 to 2 in. dia, in 1/16 in. increments. Applications include steel and metal fabricating, truck and auto...
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Portable Data Aquisition System communicates via Firewire.
DAQPad(TM)-6052E uses company's E Series data acquisition hardware to deliver 16 single-ended or 8 differential channels, 333 kS/s continuous sampling rate, and 16-bit resolution. It has two 16-bit analog outputs, two 24-bit counter/timers, and 8 digital I/O lines. IEEE 1394 FireWire connection provides high-speed, continuous transfers to and from computer. Up to 4 devices fit on same IEEE 1394...
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Platform Truck has 24 x 48 in. to 36 x 72 in. platforms.
Triple-Decker Hardwood Platform Truck transports boxes, crates, parts, or material pieces. Constructed of 1 in. thick hardwood platforms and removable chrome-plated steel push handle, truck has 1,500 lb maximum capacity, and includes 2 rigid and 2 swivel 6 x 2 in. mold-on-rubber casters. Countersunk holes allow for smooth deck surface. Versatile platform also serves as portable workbench.
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I/O Card suits PC/104-based data acquisition.
Model 104-DIO-48S, 48-bit, parallel, digital input/output card operates in temperatures from 0 to 65 deg C. 48-channel board offers Change of State (COS) detection, determines data in one READ, and contains 2 type 82C55A Programmable Peripheral Interface chips (PPI). Each PPI provides two 8-bit ports on A and B and two 4-bit ports on C. Each of its 48 I/O lines is buffered and capable of sourcing...
Read More »IC Design Software uses hierarchical design capabilities.
Cadence First Encounter Ultra provides virtual prototyping, physical synthesis, and full-chip hierarchical floor planning and placement. Cadence SoC Encounter front-to-back hierarchical IC implementation provides solutions for large-scale system-on-a-chip (SoC) design with 30-million gate synthesis and place-and-route capability. SoC Encounter partitions chips into smaller blocks to be designed...
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Packaging Station configures to suit needs.
Four-leg workbench, with telescoping legs, allows worksurface height adjustment ranging between 30 to 36 in., in 2 in. increments. Station has 1/2-ton load capacity, bench sizes from 30x60 to 36x72 in., impact- and chemical-resistant, laminate worksurface, and 180 deg rolled front edge. Solid-maple tops are also available. Accessories include shelves, shelf dividers, electrical channels,...
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Condo Wiring Panel brings in voice, data and video cables.
LittleBrother(TM) 5575 Multi-Media Manager meets on-premise structured wiring needs of apartments and condos. Layout provides logical, separate channels for voice, data, and video cables. Modules provide 6 voice ports, 6 data ports, and 8-way video splitting. Small, 8.75 x 11.125 in. unit supports 20 separate terminal locations within single residence and complies with TIA 570-A, EIA/TIA 568B...
Read More »Software Package assures full design verification.
NC-Sim Plus package includes NC-Sim mixed language simulator, which handles ASIC, SoC, and FPGA designs, and Verification Cockpit functional verification tool. It also includes TestBuilder open-source test bench development tool, which is based on C++ language, and includes C++ class libraries with transaction models and functions. Software package with BuildGates(R) synthesis tools is suitable...
Read More »Design System provides hierarchical access to parameters.
SPW 4.8 Signal Processing Worksystem block diagram design solution allows hardware, software, and RF engineers to collaborate on projects. Links with other tools include integrations with Xilinx Coregen solution, with analog design flow that supports Cadence(R) AMS Designer, and with SystemC 2.0. SPW 4.8 users can enter and simulate designs consisting of various types of models including C, C++,...
Read More »Software verifies IP-based designs.
VN-Property DX(TM) verifies properties during system simulation by measuring effectiveness of simulation against design-specific properties for SoC, ASIC, and FPGA designs. It allows property checking during any simulation, independent of test generation approach, which enables complex properties to be checked at system level. VN-Property DX includes pre-defined property libraries, user-definable...
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