PCI Card suits development and simulation applications.

Press Release Summary:



PCI-compatible PCI-Altera-485 includes PLX9054 and Xilinx for initial loading of Altera, and DMA transfer of data into and out of FIFOs. Altera controls 40 programmable RS-485/LVDS transceivers and 12 TTL IO. Each RS-485 channel is programmable for direction, termination, and function. Eight Cypress 22393 PLLs support Altera providing ability to synthesize multiple reference rates. PLX 9054 provides 33/32 PCI interface with bus master capabilities.



Original Press Release:


PCI-Altera-485 PCI-Altera-LVDS


PCI_Altera_485 comes with everything you need to load your Altera program into the 20K400.

Fantastic for development, simulation, special purpose interfaces, multiple serial and / or parallel channels.

The PCI compatible PCI-Altera-485 design is for the advanced user who wants to implement their own Altera design or requires reconfigurable logic. The PCI-Altera-485 makes the implementation and use of the 20K400E easy. Larger Altera parts are available.

The design comes with the basic features built in and the specific features ready for you. The PLX9054 and Xilinx take care of the PCI interface for initial loading of the Altera, and DMA transfer of data into and out of the FIFOs. The Altera controls 40 programmable RS-485/LVDS transceivers and 12 TTL IO. Each of the RS-485 channels is programmable for direction, termination and function. The 12 TTL IO can be inputs or outputs. Eight Cypress 22393 PLLs support the Altera providing the ability to synthesize multiple reference rates. The only thing missing is your input in the form of a coprocessor, reconfigurable logic, state-machine, simulated system, asynchronous or synchronous data processing etc.

The PLX 9054 provides a 33/32 PCI interface with bus master capabilities. The 9054 and Xilinx will be used move data to the Altera for output channels and to move data to the host for input channels. 8 input and 8 output FIFOs are provided to support 8 bi-directional channels. The intermediate FIFOs are byte wide. The PCI bus is 32 bit oriented. The 1K x 32 FIFO is used to convert the byte wide data to long word prior to DMA or post DMA depending on the direction of data transfer. The 16 intermediate FIFOs have programmable flags which can be used to cause interrupts for flow control.

The PCI-Altera-485 has been updated with optional install of LVDS transceivers creating the PCI-Altera-LVDS. There are 40 transceivers on the card and the transceivers can be implemented with 485, LVDS or mixed. The 485 transceivers are rated for 40 MHz operation. The LVDS transceivers are rated for 200 MHz operation. In addition the PCI-Altera Windows¨ driver has been updated to support XP and 2000. The PCI-Altera is designed to accept user VHDL files and the generic driver allows the user to communicate with their custom implementation using standard C. Easy to install, easy to load, easy to use.

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