Product News: Test & Measuring Instruments
Digital/Mixed Signal Oscilloscopes include IBIS-AMI support.
Press Release Summary:
April 25, 2014 - Capabilities of analysis system on MSO/DPO70000 Series include modeling of on-chip silicon behavior using IBIS-AMI models and S-parameters, improving correlation between measurement and simulation. Support for IBIS-AMI is included as part of Serial Data Link Analysis Visualizer (SDLA Visualizer) package that provides complete solution for de-embedding effects of cables, fixtures, and probes for silicon validation, system verification, backplane characterization, and embedded system performance.
Original Press Release
Tektronix Announces Enhanced IBIS-AMI, S-Parameters Modeling Support for Oscilloscopes
Press release date: April 15, 2014
Enables Fast, Accurate Characterization of On-Chip Silicon Behavior; Improves Correlation with Simulation Results
BEAVERTON, Ore. -- Tektronix, Inc., the world's leading manufacturer of oscilloscopes, today announced that it has extended the capabilities of the analysis system on its MSO/DPO70000 Series of Digital and Mixed Signal Oscilloscopes to include modeling of on-chip silicon behavior using IBIS-AMI models and S-parameters. This significantly improves correlation between measurement and simulation for faster, more accurate characterization of on-chip silicon behavior and performance for today's mobile, enterprise, and data communication standards.
As serial data rates increase, most next generation serial technologies require measurements at the far end where the eye is completely closed. Equalization must be done to open the eye before the measurements can be taken. Until now, reference equalizers based on a mathematical model have been used for compliance testing, but these equalizers lack correlation with simulators and fail to represent complex real-world silicon behavior. In contrast, IBIS-AMI models are designed using the architecture of the actual receiver silicon.
"Accurate system characterization requires visibility into on-chip behavior," said Brian Reich, general manager, Performance Oscilloscopes, Tektronix. "Until recently, this has not been available on real-time oscilloscopes for the latest high-speed serial data specifications such as SuperSpeed USB or PCI Express 3.0. The introduction of IBIS-AMI models enables silicon vendors to model chip behavior and those models can be now used on Tektronix oscilloscopes instead of the less accurate reference equalization models."
Support for IBIS-AMI is included as part of the Serial Data Link Analysis Visualizer (SDLA Visualizer) package that provides a complete solution for de-embedding the effects of cables, fixtures and probes for silicon validation, system verification, backplane characterization, and embedded system performance. SDLA Visualizer also supports "what-if" channel analysis through simulating transmitter equalization and S-parameter scaling, enabling designers to predict system performance without the need for a physical channel model.
A significant advantage to using IBIS-AMI models is correlation with simulation results and confidence that the resulting measurements match system behavior. "Since simulations are often done before silicon or physical board are available, correlation between the simulation and oscilloscope measurements has been an ongoing challenge for our customers," said Brian Burdick, IC Analog Validation Engineer of LSI Corporation. "With the addition of IBIS-AMI support, oscilloscopes are now able to go well beyond simple waveform acquisition to can provide a better representation of silicon behavior for significant time and cost savings."
Availability & Pricing
The SDLA Visualizer for Tektronix MSO/DPO70000 oscilloscopes is available now worldwide and can be purchased for $11,000 U.S. MSRP.
Webinar: Addressing Next Generation Design Challenges with EDA and Measurement solutions
Tektronix and Cadence Design Systems, Inc. are teaming up to present a webinar titled, "Addressing Next Generation Design Challenges with EDA and Measurement solutions" on Thursday, May 8, 2014 at 10:00 a.m. PST. This webinar will focus on the methodology of moving from the simulation environment to the lab and vice versa. Presenters will use an example of moving from PCIe Gen 3 to Gen 4 to help participants answer the question of how 8 Gbps hardware will work when the speed doubles. This new methodology will help engineers get the answers they need quickly. To register please visit http://info.tek.com/sdla-webinar-registration.html
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