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Baseband DSP IP Cores are optimized for low-power applications.

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February 26, 2014 - Respectively, Tensilica® ConnX BBE32EP and BBE64EP are 32- and 64-MAC baseband DSP IP cores optimized for complex number processing at low power. Products excel at processing algorithms for LTE, LTE-Advanced, 802.11ac, HDTV demodulation, 3G/HSPA+, and WiFi (including MIMO processing). Supporting power consumption levels that reduce need for hardware accelerators, cores suit such applications as smartphones and tablets, HDTVs, STBs, and automotive communications infrastructure systems.

Cadence Launches Next-Generation Tensilica High-Performance ConnX Baseband DSP Family

Cadence Design Systems, Inc.
2655 Seely Ave.
San Jose, CA, 95134

Press release date: February 19, 2014

32- and 64-MAC baseband DSP IP cores offer higher performance at lower power and area for 3G/4G LTE-Advanced, WiFi and HDTV demodulation

SAN JOSE, Calif. -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced the availability of its next generation Tensilica® ConnX baseband digital signal processor (DSP) intellectual property (IP) cores. New products in the family include the ConnX BBE32EP and BBE64EP, optimized for complex number processing at low power and ideally suited for smartphones and tablets, HDTVs, set-top boxes, and automotive communications infrastructure system applications. These two DSP IP cores excel at efficiently processing algorithms for LTE, LTE-Advanced, 802.11ac, HDTV demodulation, 3G/HSPA+, and WiFi including MIMO processing. For more detailed information on these new baseband DSPs, visit

The ConnX BBE32EP and BBE64EP cores both offer significant improvements in maximum frequency and algorithmic performance while reducing both silicon area and power consumption. When compared to earlier generations, the ConnX BBE32EP core provides a 25 percent improvement, and the ConnX BBE64EP core provides an 80 percent improvement in maximum frequency.

In addition, the ConnX BBE32EP and BBE64EP cores provide unprecedented flexibility in system implementations by supporting power consumption levels that significantly reduce the need for hardware accelerators. For example, the ConnX BBE32EP lowers power consumption by up to 33 percent compared to earlier generation cores, thereby allowing more functions to be implemented in software, while maintaining a comparable power budget.

"Whether it's a microcell, an access point, a mobile hotspot, a tablet, or a set-top box, all of these designs can benefit from the flexibility of a software-based solution for faster development time, interoperability tuning and tracking standards updates," said Jack Guedj, corporate vice president of the IP Group at Cadence. "This flexibility can only be achieved at the low power requirement of modems that implement the signal processing on programmable processors like the ConnX BBE32EP and BBE64EP."

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available here.

© 2014 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Tensilica and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries.

For more information, please contact:
Cadence Newsroom
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