Cadence Design Systems, Inc.

New Celsius Thermal Solver Simulation Software Uses Matrix Solver Technology
Software

New Celsius Thermal Solver Simulation Software Uses Matrix Solver Technology

Integrates with Cadence IC, package and PCB implementation platforms that accelerates and simplifies design iterations. Enables system analysis and design insights and empowers electrical design teams to detect and mitigate thermal issues early in design process. Performs both static and dynamic electrical-thermal co-simulations based on actual flow of electrical power in advanced 3D structures,...

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Portable Tools

Cadence Tools and Flows Achieve Production-Ready Certification for TSMC's 12FFC Process

New technologies enable chip design for emerging mid-range mobility and high-end consumer applications SAN JOSE, Calif., Sept. 11, 2017 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Cadence® digital, signoff and custom/analog tools and flows have achieved v1.0 certification for TSMC's 12nm FinFET Compact (12FFC) process technology and are production ready for customers...

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Cadence Custom/Analog and Full-Flow Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 7LP Process Node
Electronic Components & Devices

Cadence Custom/Analog and Full-Flow Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 7LP Process Node

Reference flow available for early customer engagement AUSTIN, Texas, June 20, 2017 - DESIGN AUTOMATION CONFERENCE - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its custom/analog and full-flow digital and signoff tools are now enabled for v0.5 of the GLOBALFOUNDRIES 7nm Leading-Performance (7LP) FinFET semiconductor technology. The 7LP process node is expected to deliver 40...

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Tensilica® Vision C5 DSP IP comes with iDMA and AXI4 interface.
Computer Hardware & Peripherals

Tensilica® Vision C5 DSP IP comes with iDMA and AXI4 interface.

Delivering one TeraMAC (TMAC)/sec computational capacity in less than 1mm² silicon area, Tensilica® Vision C5 DSP IP features VLIW SIMD architecture with 128-way, 8-bit SIMD or 64-way 16 bit SIMD. Offering 1024 8-bit MACs or 512 16-bit MACs resolution, unit accelerates neural network computational layers. Suitable for vision, radar/lidar and fused-sensor applications, Vision C5 DSP supports...

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Controls & Controllers

CCIX interface and verification IP solution is based on PCIe 4.0 specification.

Consisting of controller, PHY, software drivers, simulation models and user guides, Cadence® Verification IP Solution supports Xcelium™ Parallel Logic Simulator and third-party simulators. Equipped with Cadence Interconnect Validator for ensuring correctness and completeness of data, CCIX system enables seamless data sharing with speeds up to 25Gbps. Designed with ARM® CoreLink™ CMN-600...

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Services

XJTAG® DFT Assistant for OrCAD® Capture identifies common errors in a JTAG scan chain.

Enabling engineers detect and rectify PCB errors (JTAG) before production, XJTAG® DFT Assistant for OrCAD® Capture prevents costly reprints and project delays. Containing two key elements: XJTAG Chain Checker identifies common errors in a JTAG scan chain, and XJTAG Access Viewer overlays the extent of boundary scan access onto the schematic diagram, DFT allows user to export a preliminary...

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Test & Measurement

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using ARM MBIST Interface

Highlights: - Collaboration helps customers reduce the need for manual work and speed time to market - Cadence and ARM complete silicon validation using ARM Cortex-A73 processor SAN JOSE, Calif., Nov. 14, 2016 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Modus™ Test Solution now supports the ARM® Memory Built-In Self Test (MBIST) interface, enabling...

Read More »
New Celsius Thermal Solver Simulation Software Uses Matrix Solver Technology
Software

New Celsius Thermal Solver Simulation Software Uses Matrix Solver Technology

Integrates with Cadence IC, package and PCB implementation platforms that accelerates and simplifies design iterations. Enables system analysis and design insights and empowers electrical design teams to detect and mitigate thermal issues early in design process. Performs both static and dynamic electrical-thermal co-simulations based on actual flow of electrical power in advanced 3D structures,...

Read More »
Portable Tools

Cadence Tools and Flows Achieve Production-Ready Certification for TSMC's 12FFC Process

New technologies enable chip design for emerging mid-range mobility and high-end consumer applications SAN JOSE, Calif., Sept. 11, 2017 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Cadence® digital, signoff and custom/analog tools and flows have achieved v1.0 certification for TSMC's 12nm FinFET Compact (12FFC) process technology and are production ready for customers...

Read More »
Cadence Custom/Analog and Full-Flow Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 7LP Process Node
Electronic Components & Devices

Cadence Custom/Analog and Full-Flow Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 7LP Process Node

Reference flow available for early customer engagement AUSTIN, Texas, June 20, 2017 - DESIGN AUTOMATION CONFERENCE - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its custom/analog and full-flow digital and signoff tools are now enabled for v0.5 of the GLOBALFOUNDRIES 7nm Leading-Performance (7LP) FinFET semiconductor technology. The 7LP process node is expected to deliver 40...

Read More »
Tensilica® Vision C5 DSP IP comes with iDMA and AXI4 interface.
Computer Hardware & Peripherals

Tensilica® Vision C5 DSP IP comes with iDMA and AXI4 interface.

Delivering one TeraMAC (TMAC)/sec computational capacity in less than 1mm² silicon area, Tensilica® Vision C5 DSP IP features VLIW SIMD architecture with 128-way, 8-bit SIMD or 64-way 16 bit SIMD. Offering 1024 8-bit MACs or 512 16-bit MACs resolution, unit accelerates neural network computational layers. Suitable for vision, radar/lidar and fused-sensor applications, Vision C5 DSP supports...

Read More »
Controls & Controllers

CCIX interface and verification IP solution is based on PCIe 4.0 specification.

Consisting of controller, PHY, software drivers, simulation models and user guides, Cadence® Verification IP Solution supports Xcelium™ Parallel Logic Simulator and third-party simulators. Equipped with Cadence Interconnect Validator for ensuring correctness and completeness of data, CCIX system enables seamless data sharing with speeds up to 25Gbps. Designed with ARM® CoreLink™ CMN-600...

Read More »
Services

XJTAG® DFT Assistant for OrCAD® Capture identifies common errors in a JTAG scan chain.

Enabling engineers detect and rectify PCB errors (JTAG) before production, XJTAG® DFT Assistant for OrCAD® Capture prevents costly reprints and project delays. Containing two key elements: XJTAG Chain Checker identifies common errors in a JTAG scan chain, and XJTAG Access Viewer overlays the extent of boundary scan access onto the schematic diagram, DFT allows user to export a preliminary...

Read More »
Test & Measurement

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using ARM MBIST Interface

Highlights: - Collaboration helps customers reduce the need for manual work and speed time to market - Cadence and ARM complete silicon validation using ARM Cortex-A73 processor SAN JOSE, Calif., Nov. 14, 2016 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Modus™ Test Solution now supports the ARM® Memory Built-In Self Test (MBIST) interface, enabling...

Read More »

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