How to Test High-Speed Memory with Non-Intrusive Embedded Instruments Explained in White Paper
Richardson, TX -A new white paper from ASSET® InterTech (www.asset-intertech.com), the leading supplier of tools for embedded instrumentation, explains how non-intrusive software-driven embedded instruments can overcome many of the challenges of testing, validating and debugging high-speed memory buses such the DDR 3 or DDR4 (DDR3/4) buses, and others.
The white paper describes the engineering tradeoffs involved with several non-intrusive test methods, including processor-controlled test (PCT), FPGA-controlled test (FCT), memory built-in self test (MBIST), boundary-scan test (BST) and functional test. The 21-page paper is written by Al Crouch, ASSET's chief technologist for core instrumentation and vice-chairman of the working group developing the IEEE P1687 Internal JTAG (IJTAG) standard for embedded instruments.
"How to test high-speed memory with non-intrusive embedded instruments" can be downloaded from this page: www.asset-intertech.com/Solutions/Board-Test-Debug/Memory-Test-Whitepaper
Go to this page to view the many resources in ASSET's News Room, including a variety of other tutorials and white papers: www.asset-intertech.com/News
About ASSET InterTech
ASSET InterTech is the leading supplier of tools for embedded instrumentation for design validation, test and debug. The ScanWorks® platform for embedded instruments provides automation, access and analysis tools in one environment. Users can quickly and easily validate and test semiconductors, circuit boards or entire systems during every phase of a product's life, including design, manufacturing/repair and field maintenance. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.
For product information, call 888-694-6250, fax 972-437-2826, e-mail ai-info@asset-intertech.com or visit www.asset-intertech.com
