How to do At-Speed Functional Verification of Serial Interfaces without Functional Software is Described in New eBook
Asset InterTech Inc.
2201 N. Central Expy Ste. 105
Richardson, TX, 75080
Press release date: March 11, 2014
Richardson, TX – Historically, verifying the at-speed functionality of serial interfaces on prototype circuit boards has required the system’s functional software. But the functional software is often not ready yet when prototypes arrive. That means delaying the product’s migration into manufacturing.
A new eBook published by ASSET® InterTech (www.asset-intertech.com) describes how a board bring-up team can use boundary-scan (JTAG), an on-board FPGA and an embedded instrument to test and verify serial interfaces like UART, SPI, I2C and others. ASSET is the leading supplier of debug, validation and test tools.
“When first prototypes for a new design arrive, you want to start wringing them out right away,” said Kent Zetterberg, an ASSET product manager and author of the new eBook. “The last thing the board bring-up team wants to do is wait for the functional software to be completed. We wrote this eBook so engineers would realize they can avoid these sorts of delays. Another good thing about this method is the embedded instrument can be re-used on other designs. So the methodology is easily replicated.”
Titled “Serial Port Functional Test with FPGA UART IP and JTAG,” the new eBook is available for downloading from the eResources center on the ASSET website at: http://www.asset-intertech.com/
Other informative eBooks, white papers and videos on issues relating to chip, board and system debug, validation and test can be downloaded from the ASSET website at: http://www.asset-intertech.com/eResources
About ASSET InterTech
ASSET InterTech is a leading supplier to the electronics industry of tools based on embedded instrumentation. Its SourcePoint debugger and the ScanWorks platform for embedded instruments overcome the limitations of external test and measurement equipment by applying instrumentation embedded in code and semiconductors to debug and validate software and firmware, and to perform design validation and manufacturing test on chips and circuit boards. ASSET’s recent acquisition of Arium (www.arium.com) added a powerful suite of firmware debug and trace tools to the ScanWorks platform. Designers can quickly debug firmware and then diagnose how it interacts with hardware. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.
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ASSET and ScanWorks are registered trademarks and Arium and SourcePoint are trademarks of ASSET InterTech, Inc.
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