Vector DSP targets 4G software-defined radios.
Press Release Summary:
Model CEVA-XC323(TM) DSP scales to address range of cell site solutions including femtocells, picocells, microcells, and macrocells. Supporting WCDMA, HSPA, WiMAX, LTE, and LTE-A standards and multicore architectures, it offers full 3G/4G PHY solution. Unit provides 8-way VLIW, 512-bit SIMD operations, 32 MAC operations/cycle, and support for complex arithmetic and non-vectorized operations. Operational modes include full operation, debug bypass, memory retention, and power shut-off.
Original Press Release:
CEVA Expands into 4G Wireless Infrastructure Market with Industry-First Vector DSP for Software Defined Radio Platforms
CEVA-XC323(TM) DSP delivers up to 4x performance improvement for 4G processing compared to incumbent infrastructure VLIW DSPs; Supports multi-core architectures and seamless software migration path from previous-generation infrastructure DSP vendors
MOUNTAIN VIEW, Calif. - CEVA, Inc. [(Nasdaq: CEVA); (LSE: CVA)], the leading licensor of silicon intellectual property (SIP) platform solutions and DSP cores, today introduced the CEVA-XC323(TM), the industry's first high performance vector DSP for 4G wireless infrastructure applications. The CEVA-XC323 delivers up to 4x performance improvement in wireless infrastructure applications compared to incumbent infrastructure VLIW DSPs, such as those offered by Texas Instruments, and lowers the overall bill-of-materials by significantly reducing the number of processors and hardware accelerators required. The CEVA-XC323 is already in design with a wireless infrastructure vendor for 4G Software Defined Radio (SDR) base-station applications.
The CEVA-XC323 is scalable to address the complete range of cell site solutions required by network operators, including femtocells, picocells, microcells and macrocells. Its flexible architecture provides efficient support for both legacy and next-generation wireless standards such as WCDMA, HSPA, WiMAX, LTE and LTE-A. The architecture leverages the widely-adopted CEVA-X DSP engine which has shipped in more than 100 million devices to date, including advanced wireless infrastructure equipment and wireless handsets from the world's leading OEMs.
The CEVA-XC323 integrates two high-precision vector communication units specifically designed to cope with the heavy processing load found in base-stations and supports homogenous multi-core designs commonly used in modern infrastructure architectures. In addition, the core incorporates extensive support for wireless infrastructure control plane processing, typically handled by separate processors. Complemented with CEVA-XCnet software partners, CEVA-XC323 offers a full 3G/4G PHY solution, dramatically shortening the development time of multi-mode wireless infrastructure designs.
"The CEVA-XC323 DSP is a game changer in the 4G wireless infrastructure space and represents an important milestone in CEVA's evolutionary growth strategy beyond our stronghold of the wireless terminal market," said Gideon Wertheizer, CEO of CEVA. "Incumbent infrastructure DSP vendors have relied upon an inefficient combination of traditional VLIW DSP architectures and hardware blocks to compensate for the lack of DSP performance. This results in complicated software design, limited platform reuse across different products, and essentially locks the OEM to the DSP supplier. With the introduction of the CEVA-XC323 DSP, our customers can apply software defined radio technologies to improve performance, flexibility and time-to-market for their infrastructure processor designs. For the OEM, the inherent benefits of our IP licensing model include the ability to source chips from multiple vendors and the option to license the CEVA-XC323 DSP directly and manufacture chips at any foundry."
High Performance Architecture
The CEVA-XC323 core combines conventional DSP capabilities with advanced vector processing units to offer higher instruction-level parallelism (ILP) including: 8-way VLIW, 512-bit SIMD operations, 32 MAC operations per cycle and native support for complex arithmetic. CEVA-XC323 also offers strong support for non-vectorized operations, control plane functions and system code, and full software compatibility with the CEVA-X DSP. Specifically targeting wireless infrastructure applications, the CEVA-XC323 provides extensive instruction set support covering the most time-critical PHY transceiver parts, including DFT, high-precision FFT, channel estimation, MIMO detectors, interleaver/de-interleaver and inherent support for Viterbi decoding in software.
Extensive Multi-Core support
Utilizing an innovative scalable and modular architecture, the CEVA-XC323 addresses the precise requirements of any 4G wireless infrastructure application. It allows full support for multi-core system design, enabling licensees to reuse the same architecture for a wide range of products with the ability to precisely scale chip performance up and down, and maintain software compatibility and portability. With wide AXI system buses, dedicated control and messaging mechanisms, exclusive access management, data snooping support and debug mechanism, the CEVA-XC323 offers extensive support for the massive data transfers typically required in 4G modems.
Architected for Energy Efficient SoC Design
The CEVA-XC323 DSP dramatically reduces power consumption in infrastructure designs, with an innovative integrated Power Scaling Unit (PSU), providing advanced power management for both dynamic and leakage power. The DSP supports multiple voltage domains associated with the main functional units, such as the DSP logic, the instruction and data memories, and so forth. The core also supports multiple operational modes ranging from full operation, to debug bypass, to memory retention, to complete power shut-off (PSO). Furthermore, the AXI full duplex buses offer low-power features, such as ability to shut down when no data traffic is present.
Full eNodeB LTE PHY solution available through CEVA-XCnet partners
Through the CEVA-XCnet partner program, CEVA-XC323 licensees can gain access to a fully optimized eNodeB LTE PHY solution, allowing them to reduce development costs and time to market for 4G wireless infrastructure solution designs.
"Wireless operators require significant improvements in base station technology in order to deal with increasing network data usage and lower network deployment costs for next generation 4G networks," said Bruce Duysen, President of ArrayComm. "The CEVA-XC323 DSP offers the highest-performance processor architecture for 4G wireless infrastructure and provides a lower cost and superior alternative to today's existing 4G DSP chip solutions. We are delighted to extend our partnership with CEVA to offer our eNodeB LTE PHY on their newest DSP."
According to Thomas Kaiser, CEO of mimoOn, "We have been closely collaborating with CEVA and its customers on the CEVA-XC for UE applications and are delighted to extend this partnership for eNodeB customers as well. The CEVA-XC323 DSP revolutionizes the wireless infrastructure market using vector DSP concepts that are a proven success for terminal applications. Leveraging our mi!MobilePHY(TM) & mi!MobileSTACK(TM) LTE expertise, mimoOn will deliver our mutual customers a flexible and scalable solution for Macrocell, Picocell & Femtocells."
Seamless Migration from Existing Wireless Infrastructure DSPs
The CEVA-XC323 supports easy software migration from off-the-shelf DSP chips, including those from Texas Instruments and Freescale, to customer SoC designs incorporating the CEVA DSP. The combination of extended compiler support for legacy DSP software and a similar system architecture enables licensees to efficiently migrate the legacy code.
Easy Software Development
The ability to program in C is essential for reducing development time and ensuring easy portability to future platforms. The CEVA-XC323 DSP architecture is compiler-driven, implementing an orthogonal instruction set so as to ensure optimal utilization of the processor capabilities from C-level. The processor is supported by CEVA-Toolbox(TM), a complete software development, debug, and optimization environment.
CEVA-Toolbox is an advanced Integrated Development Environment (IDE), which includes a powerful compiler that facilitates software development without the need for users to master architecture-specific details. The CEVA optimizing C-compiler supports the CEVA Vec-C(TM) language extensions for vector processors, enabling the entire architecture to be programmed in C-level. An integrated simulator provides accurate and efficient verification of the entire system including the memory sub-systems. In addition, CEVA-Toolbox includes libraries, a graphical debugger, and a complete optimization tool chain named CEVA Application Optimizer. The Application Optimizer enables automatic and manual optimization applied in the C source code.
CEVA-XC323 Live Webinar
On November 9th, CEVA will hold a live webinar to introduce the CEVA-XC323 DSP architecture. To register for this webinar or for further information, visit ceva-dsp.com/xcwebinar.
Availability
CEVA-XC323 is currently available for licensing. For more information, contact sales@ceva-dsp.com.
About CEVA, Inc.
CEVA is the world's leading licensor of silicon intellectual property (SIP) DSP cores and platform solutions for the mobile handset, portable and consumer electronics markets. CEVA's IP portfolio includes comprehensive technologies for cellular baseband (2G / 3G / 4G), multimedia, HD video and audio, voice over packet (VoP), Bluetooth, Serial Attached SCSI (SAS) and Serial ATA (SATA). In 2009, CEVA's IP was shipped in over 330 million devices, powering handsets from 7 out of the top 8 handset OEMs, including Nokia, Samsung, LG, Motorola, Sony Ericsson and ZTE. Today, more than one in every four handsets shipped worldwide is powered by a CEVA DSP core. For more information, visit www.ceva-dsp.com
