Translator Clock ICs help solve jitter issues.
Share:
Press Release Summary:
Series PI6C4853x consists of 3.3 V differential clock converters with 4 pairs of LVPECL outputs and speeds to 800 MHz. Each device has different input signals to convert and fanout to 4 LVPECL outputs. Suited for networking/telecommunications, storage, and industrial markets, devices are designed without PLLs to eliminate possibility of injecting noise or jitter during conversion. D-latch is implemented to prevent any runt pulse when switching asynchronous clocks.
Original Press Release:
Pericom Semiconductor Launches LVPECL Translator Clock IC's that Help Solve Jitter Issues
SAN JOSE, Calif., September 20, 2004 - Pericom Semiconductor Corporation (NASDAQ: PSEM), a worldwide preferred supplier of high-speed integrated circuits and frequency control devices, today launched a new family of 3.3V, 1:4 LVPECL Clock Buffers with speeds up to 800 MHz. The PI6C4853x IC's target the Networking/Telecommunications, Storage, and Industrial System markets.
Due to the variety of high-speed applications using LVPECL clock signals and other differential signals, most engineers need to design around mixed-signal architectures. High-speed LVPECL system environments are also very sensitive to jitter. PI6C48533-01 (Differential to LVPECL), PI6C48535-01 (LVCMOS to LVPECL), PI6C48535-11 (Crystal to LVPECL) are ideal solutions for solving translation requirements as well as eliminating jitter concerns.
Pericom's PI6C4853x-xx products are 3.3V high-performance differential clock converters with 4 pairs of LVPECL outputs. Each device has different input signals to convert and Fanout to four LVPECL outputs. In addition, each device offers a selection of two inputs for systems with Fail Safe and Redundancy requirements. Some systems distribute a clock signal from board to board, so if the main system clock fails, the local (backup) clock will be switched over to continue the operation. All three devices are designed without PLL's in order to eliminate any possibility of injecting noise or jitter during conversion. A D-latch is also implemented to prevent any runt pulse when switching asynchronous clocks.
Common Features:
o Power Supply: 3.3V
o I/O Configuration: 1 to 4
o Low Skew: 30ps maximum
o Part Skew: 150ps maximum
o Speed: 500 to 800 MHz
o Propagation Delay: 1.5ns maximum
o No Jitter: Non-PLL LVPECL clock buffer
o Operating Temperature: -40C to +85C
o Package: 20-pin Lead-free & Green TSSOP
Samples are available today with full production in November. Free product samples, datasheets, IBIS models, technical support, and application notes can be found on the company website. Pricing is $3 in 5000 unit quantities.
Pericom Semiconductor Corporation (NASDAQ: PSEM) offers customers worldwide the industry's most complete silicon and quartz based solutions for the Computing, Communications, and Industrial market segments. Our broad portfolio of leading-edge analog, digital, and mixed-signal integrated circuits and SaRonix frequency control products are essential in the timing, transferring, routing, and translating of high-speed signals as required by today's ever-increasing speed and bandwidth demanding applications. Company headquarters are in San Jose, California, with design centers and sales offices located globally. www.pericom.com
