Software hastens compile times, minimizes memory footprint.
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Press Release Summary:
Quartus® II v7.1 lets designers achieve accelerated compile times via place-and-route algorithms while minimizing memory footprint of transceiver-based Arria(TM) GX FPGAs. Along with 64-bit Windows and multi-processor support, software also includes SOPC Builder automated system development tool, GUI, and Avalon® Streaming interface. Other features include Avalon Memory-Mapped clock-crossing bridge, pipeline bridge, and scatter-gather direct memory access controller.
Original Press Release:
Achieve 2X Faster Compile Times and Half the Memory Footprint with Altera Quartus II Software v.7.1
Design Now for the New Low-Cost, Transceiver-Based Arria GX FPGA Family
SAN JOSE, Calif., May 8 -- Designers can achieve more than 2X faster compile times and half the memory footprint of the nearest high-end FPGA by using Altera Corporation's (NASDAQ:ALTR) Quartus(R) II software version 7.1, the company announced today. This new software version continues Altera's leadership in delivering the highest levels of performance and productivity. Customers can also begin designing today for the entire Arria(TM) GX FPGA family (http://altera.com/agxrelease) in both the Subscription Edition and Web Edition of Quartus II software.
"We have a commitment to our customers to deliver cutting-edge performance and productivity. As the only FPGA vendor to offer 64-bit Windows and multi-processor support, in addition to faster compile times and reduced memory usage, Altera provides significant advantages when compared with competitors," said Chris Balough, Altera's director of software and embedded marketing.
Faster Compile Times
Altera's compile time improvements address the productivity needs of customers relying on Quartus II software to design their next-generation systems. Using advanced place-and-route algorithms, Quartus II software version 7.1 and Stratix(R) III FPGAs deliver, on average, more than 2X faster compile times when compared to competing high-end 65-nm FPGAs. To further accelerate the design cycle, customers using multi-processor computers see an additional 20 percent reduction in compile times over single-processor computers. Altera's Quartus II software is the only software from an FPGA vendor offering multi-processor (e.g., the Intel Core 2 Duo and Quad and AMD Athlon 64 X2) support, taking advantage of today's dual- and quad-core computers.
Enhanced SOPC Builder Tool
This new version also includes several productivity updates to Altera's SOPC Builder automated system development tool. An improved infrastructure and a more responsive GUI allows for faster implementation of large systems, and a new Avalon(R) Streaming interface is optimized to send streaming data between two intellectual property (IP) blocks. Version 7.1 also includes a new Avalon Memory-Mapped clock-crossing bridge, a pipeline bridge and a scatter-gather direct memory access (DMA) controller for improved system performance.
Device Support
Customers can use Quartus II software version 7.1 to design for all members of Altera's recently announced product families, including Arria GX, Stratix III and Cyclone(R) III FPGAs. With immediate support for the new Arria GX family in both the Subscription Edition and Web Edition of Quartus II software, designers have opportunities to get their PCI Express x1 and x4, Gigabit Ethernet and Serial RapidIO(TM) designs to market quickly.
Additional Enhancements
Version 7.1 of Quartus II software includes a number of features and enhancements to help customers achieve the highest productivity and performance when designing with Altera(R) FPGAs, CPLDs and structured ASICs.
-- Faster TimeQuest timing analyzer -- Improves productivity with faster timing closure featuring improved compile time, less memory usage and easier conversion from Altera's classic timing analyzer.
-- New compile-time advisor -- Recommends compile-time saving settings during the design flow to improve productivity.
-- New in-system sources and probes editor -- Reduces verification time by allowing designers to drive stimuli to the device and sample internal nodes during run time.
-- Expanded synthesis -- Provides faster design entry with a new text editor, new HDL templates and true dual-port RAM inferencing.
-- Updated parallel flash loader -- Offers quicker device configuration with 2X faster flash programming times and burst mode support for flash devices.
-- Enhanced usability -- Simplifies the design process and accelerates the sign-off process by using the advanced Quartus II message console.
-- Smart notification -- Automatic notifications via the Quartus II desktop of new software downloads and service packs.
Pricing and Availability
Both the Subscription Edition and free Web Edition of Quartus II software version 7.1 are now available for download at www.altera.com/download. The Subscription Edition is also available in DVD format by request at www.altera.com/. Altera's software subscription program simplifies obtaining Altera design software by consolidating software products and maintenance charges into one annual subscription payment. Subscribers receive Quartus II software, the ModelSim(R)-Altera edition and a full license to the IP Base Suite, which includes ten of Altera's most popular IP (DSP and memory) cores. The annual software subscription is $2,000 for a node-locked PC license. Quartus II design software supports major operating systems, including Microsoft Windows XP Professional x64, Microsoft Windows XP and 2000, UNIX (Solaris 8 and 9), Red Hat Enterprise Linux 3.0 and 4.0, and SUSE Enterprise Linux 9.
About Altera
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more at www.altera.com/.
Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holder. RapidIO is the trademark of the RapidIO Trade Association. ModelSim is a trademark of Mentor Graphics Corp.
