RFIC Simulator addresses RF CMOS and SiGe technologies.
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Press Release Summary:
Developed for performing RFIC simulation and analysis, GoldenGate(TM) v4.0 is integrated with Cadence's Analog Design Environment and uses Spectre(TM) Process Design Kits natively without need for translation. It offers 64-bit support and can run Monte Carlo analysis on parallel machines. Able to perform various analyses in minutes at transistor level, software can simulate designs with 15,000+ active devices and over 1 million post parasitic elements.
Original Press Release:
Xpedion Design Systems Raises RFIC Simulation Bar with Latest Release Goldengate(TM) 4.0
Milpitas, CA (USA) - January 30, 2006 - Xpedion Design Systems, the leading provider in next generation RFIC simulation, today announced the latest version of its GoldenGate(TM) simulator, version 4.0. This new release features capabilities such as running Monte Carlo analysis on parallel machines, dramatic simulation time reduction, remarkable memory efficiency, improved workflow and 64-bit support.
GoldenGate 4.0's improvements are a result of Xpedion's focus to solve the problems faced by RFIC designers. The challenges faced by RF companies in this highly competitive consumer wireless marketplace are staggering. These challenges are twofold: how to meet tight specifications and how to get into high volume production. These challenges are magnified by the trend into lower geometry RF CMOS and SiGe technologies that cause traditional design tools and methodologies to break down. GoldenGate 4.0 addresses this break down.
"RFIC Designers need solutions for a new breed of design issues" said Pete Rodriguez, Chief Executive Officer at Xpedion. "The leading RFIC companies use GoldenGate because we work with them to solve their problems in reaching high yield production."
About GoldenGate
The GoldenGate RFIC simulator has been developed specifically for RFIC designers who wish to perform advanced simulation and analysis. GoldenGate is completely integrated with Cadence's Analog Design Environment (ADE) and uses Spectre(TM) Process Design Kits natively without the need for translation. Its capacity and performance provides RFIC designers the ability to automatically analyze ACPR, EVM, Gain Compression, SSNA, IP3 and many other analyses in minutes at the transistor level. Complete transceivers can be simulated with industry standard modulated sources. GoldenGate is powerful enough to simulate designs with over fifteen thousand (15,000) active devices and over one million (1,000,000) post parasitic elements. Foundry-proven accuracy ensures higher yields and fewer design spins.
Company Background
About Xpedion Design Systems
Xpedion delivers the most advanced RFIC simulation technology in the industry. This enables RFIC designers to analyze their designs at the transistor level faster and more accurately. The benefits are measured in shorter design cycles, reduced silicon spins and higher performing products. Xpedion is a member of the Cadence (NYSE: CDN - News ) Connections Program, the Mathworks Partners Program, the Platform Partners Program, and is a Sun Microsystems (Nasdaq: SUNW - News ) development partner. Xpedion's products are also available on the Red Hat (Nasdaq: RHAT - News ) Linux operating system. Xpedion Design Systems, Inc. is located at 1900 McCarthy, Suite 210, Milpitas, California, USA, 95035. Telephone: +1 (408) 449-4000, FAX: +1 (408) 449-4030, email: info@xpedion.com, Website: www.xpedion.com.
Company Contacts:
Xpedion Company Contact:
Mr. Pete Johnson
Tel: +1 (408) 449-4022
petej@xpedion.com
GoldenGate/Sim and GoldenGate/Model Compiler are trademarks of Xpedion Design Systems. All other trademarks are the property of their respective owners.
©2005 Xpedion Design Systems, Inc.
