Press Release Summary:
Digital IF Receiver is designed to accept IF data samples up to 16-bits wide that are then mixed using quadrature numerically controlled oscillator to produce In-phase and Quadrature (I and Q) baseband data streams. Complex 4th
order decimating cascading integrator comb filters provide programmable sample rate reduction. Programmable coefficient finite impulse response filters, with up to 64 complex taps, generate I and Q baseband data streams.
Original Press Release:
Nova Engineering's New Digital IF Receiver Core Provides a Complete Solution
Cincinnati, OH, January 21, 2002 - Nova Engineering, Inc. is proud to announce the release of the Digital IF Receiver, which is the latest addition to their line of communication IP (Intellectual Property) cores targeted for programmable logic devices (PLDs).
The Digital IF Receiver core is a complete IF to baseband downconverter solution implemented in the industry standard programming language, VHDL. In this unique core, a sampled intermediate frequency (IF) data stream is filtered and downsampled to the original baseband data. The proven performance of the Digital IF Receiver core can significantly reduce design time and risk in any digital receiver project. With
programmable sample rates, local oscillator (LO) frequency, filter coefficients, and baseband data rates, the Digital IF Receiver can meet the requirements of a host of today's demanding digital communications designs, offering flexibility not found in general purpose hardware.
In addition, because it is targeted for PLDs, the designer can add custom baseband processing without adding hardware. In applications where a digital signal processor (DSP) is used for final processing, the Digital IF Receiver reduces the processing
requirements of the DSP by performing the translation to baseband and reducing the output sample rate. This reduction in processing load can dramatically improve performance and reduce the complexity of the overall system, resulting in faster time-to-market and lower product cost.
"As communication system developers become increasingly reliant on firmware solutions, the need for proven, flexible cores in VHDL, such as the Digital IF Receiver, increases dramatically," says Dave Jordan, Products Director. "The Digital IF Receiver completes several functional operations internally, whereas most other IP cores provide only partial solutions. Because of this, the Digital IF Receiver core inherently is a much greater overall value, and should prove to be a worthy addition to communication system designers' toolsets."
Nova Engineering's Digital IF Receiver is designed to accept IF data samples up to 16-bits wide that are then mixed using a quadrature numerically controlled oscillator (NCO) to produce In-phase and Quadrature (I and Q) baseband data streams. Complex 4th
order decimating cascading integrator comb (CIC) filters provide programmable sample rate reduction, and programmable coefficient finite impulse response (FIR) filters with up to 64 complex taps generate I and Q baseband data streams. The IF sample rate and
output symbol rate are programmable and limited only by the system clock.
The Digital IF Receiver supports both high-speed IF sampling and IF under-sampling, wherein the sampling rate is based on the much narrower bandwidth of interest rather than on the IF center frequency. When IF under-sampling is used, filtering by the Digital IF Receiver allows the bandwidth of interest to be selectively passed while attenuating undesired sampling artifacts.
Nova Engineering is a Premier member of the Altera Megafunction Partners Program (AMPP), and therefore its entire line of communication IP cores, including the Digital IF Receiver, are compatible with other Altera-based Megafunctions written in VHDL.
Availability is immediate. Free evaluation copies are available. Pricing is $14,995 for VHDL Source code, which comes with a one year unlimited use license, or $5,995 for an encrypted Netlist, which comes with a six month limited use license.