Process Allows Nanoscale MEMS to be created inside CMOS wafer.
NanoEMS(TM) technology enables construction of nanoscale MEMS (Micro Electro Mechanical Systems) within structure of actual CMOS wafer itself using standard, high-volume CMOS lines. Existing metal layers in CMOS wafer are used to form MEMS structure via standard mask techniques, and Inter Metal Dielectric is etched away using vapour HF. Etching uses equipment already available for volume...
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