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Structured ASIC has almost one million logic gates.

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May 25, 2006 - Along with 900,000 NAND-2 equivalent programmable logic gates, FIT-18 Template(TM) features 400 I/O pins, 98 of which can be configured for PCI/PCI-X interfaces. It is targeted at applications needing 5 V tolerant PCI/PCI-X I/Os in chip design. Implemented in 0.18 Ám process, product provides 80 KB SRAMs in single- and dual-port configurations for en-route data buffering. Other on-chip functions include PLL, DLL, OSC, and power-on-reset.

Faraday Expands Structured ASIC Product Line with FIT-18 Template(TM)

(Archive News Story - Products mentioned in this Archive News Story may or may not be available from the manufacturer.)

Faraday Technology Corporation
No.5, Li-Hsin Rd.III, Hsinchu Science Park
Hsinchu City, Taiwan

Press release date: April 24, 2006

New Structured ASIC Family Member Targets Markets for Existing PCI/PCI-X Based Systems

HSINCHU, Taiwan, April 24 / -- Faraday Technology (TAIEX: 3035), a leading ASIC and IP provider, today announced that it is introducing a new family of structured ASIC, called Template(TM), with the first member being the FIT-18. The FIT-18 includes almost one million gates of customer logic design capacity, 80K Bytes of on-chip memory capacity, 400 I/O pins of which, 98 can be configured for PCI/PCI-X interfaces. The FIT-18 is available for customer design and tape-out immediately.

"With the success in our Composer(TM) structured ASIC product line, I am very pleased to see the Template line started," said Dr. George Hwang, Vice President of R&D and Marketing at Faraday Technology. "The team's market focus and understand has been, and will continue to be the reason for our success in Structured ASIC, and FIT-18 is no exception."

Template Structured ASIC Overview

Traditional structure ASIC product lines from the industry has followed the philosophy of gate array technology, with a wide array of varying sizes of gates, I/Os and memory blocks. This almost random lineup of products requires enormous upfront investment in design as well as product inventory later.

Faraday has taken a different approach, with a small number of market focused Structured ASICs called the Composers. All these chips have application specific logic such as CPU and DRAM controller built-in to accelerate time-to-market and reduce cost. The NetComposer-1 (NC-1) and PeripheralComposer-1 (PC-1) have garnered ten design wins, and are expected to generate about $30M in revenue from existing design wins, starting now.

The new family, Template takes on the same philosophy but with a different implementation. Each Template will have its market or application focus, resulting in specific numbers of I/Os, customer logic gates and memory. However, unlike the Composer product line, the Template product line does not include any Faraday-designed logic component. The entire programmable portion of the chip is available for customers to innovate. This approach is most suitable for customers who are considering using FPGAs or FPGA replacements, but are concerned about the high unit cost or power consumption.

FIT-18 Overview

The FIT-18 is the first Template for Faraday. It is targeted at applications needing 5V tolerant PCI/PCI-X I/Os in the chip design. 3.3V/5V tolerant PCI-based systems have entered matured stages, and in some cases have even been replaced by newer I/Os such as USB or PCI-Express. However, this legacy interface is still shipping in very high volume, and some are now in need of functional upgrades while retaining the same PCI/PCI-X standard.

The FIT-18 has 58 dedicated PCI/PCI-X I/O pins, with 40 additional PCI compatible programmable I/Os for customers to implement a wide variation of PCI-based I/O connection. 900,000 NAND-2 equivalent logic gates enable implementation of complex state machines for moving PCI/PCI-X data to other I/O ports. Finally, about 80,000 Bytes of SRAMs (623,000 bits) in both single-port and dual-port configurations allow customers to buffer the data en-route. Other on-chip functions include PLL, DLL, OSC and power-on-reset (POR).

"The FIT-18 is the perfect product to provide new functionality to existing PCI/PCI-X systems," said Christopher Moezzi, Vice President of International Marketing at Faraday. "Faraday will expand the Template product line with other market specific members to increase our Structured ASIC business."

Pricing & Availability

The FIT-18 is implemented in 0.18um process. It is available immediately for customer design and tape out.

About Faraday Technology Corporation

Faraday Technology Corporation is a leading silicon IP and fabless ASIC vendor. The company's broad IP portfolio includes 32-bit RISC CPUs, USB 2.0, Ethernet, Serial ATA, and PCI-Express. With more than 630 employees and 2005 revenue of $175 million, Faraday is one of the largest fabless ASIC companies in the Asia-Pacific region, and it also has a significant presence in other markets, worldwide. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. For more information, please visit:
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