Embedded Processor Benchmark is available to industry.
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Press Release Summary:
CoreMark(TM) v1.0 provides starting point for measuring core performance and basic pipeline structure of processors from 8-bit MCUs to high-end 32-bit devices and architectures. Workload contains algorithms that deliver realistic mixture of read/write operations, integer operations, and control operations. Specific algorithms include matrix manipulation, linked-list manipulation, state machine operation, and Cyclic Redundancy Check (CRC).
Original Press Release:
EEMBC® Opens New CoreMark(TM) Embedded Processor Benchmark to the Industry
CoreMark(TM) Delivers the First Industry-Standard Benchmark Community
EL DORADO HILLS, Calif., June 1 -- The Embedded Microprocessor Benchmark Consortium today announced the availability of CoreMark 1.0, the first openly-available benchmark from EEMBC. While traditional EEMBC benchmarks focus on specific embedded market segments and are exceptional at approximating real-world performance of embedded processors, CoreMark provides a starting point for measuring a processor's core performance and basic pipeline structure and can be used to evaluate processors ranging from 8-bit microcontrollers to high-end 32-bit devices and architectures.
To establish an industry standard, all EEMBC benchmarks, including CoreMark, are defined by EEMBC members and are thoroughly tested on a wide variety of platforms prior to release. Also, similar to other EEMBC industry-standard benchmarks, the portability of CoreMark is a key requirement to ensure wide-ranging usability.
The CoreMark workload contains several commonly used algorithms that include matrix manipulation to allow for the use of MAC and math operations, linked-list manipulation to exercise the use of pointers, state machine operation (common use of data dependent branches), and Cyclic Redundancy Check (CRC). These algorithms deliver a realistic mixture of read/write operations, integer operations, and control operations.
"As a service to the entire embedded processor industry, one of our primary goals for CoreMark was to create a free CPU benchmark standard," stated Shay Gal-On, EEMBC Director of Software Engineering. "Similar to the infamous Dhrystone benchmark, CoreMark is free, small, and easily portable to most systems. However, unlike Dhrystone, CoreMark is not susceptible to a compiler's ability to optimize the work away and is governed by consistent run and reporting rules."
EEMBC has set up a specific website (www.coremark.org) for the distribution of CoreMark source code and the publication of scores. All CoreMark users are encouraged to enter their scores and platform configurations on this website. This publicly available list of scores will allow users to make quick comparisons between processors. Although CoreMark contains its own self-verification software, to ensure that extra level of credibility, the EEMBC Technology Center will offer score certifications on CoreMark for EEMBC members.
"The accessibility of CoreMark will make it easier for embedded industry cohorts to challenge submitted scores," elaborated Markus Levy, EEMBC president. "In support of these challenges, and for other topics related to embedded processor benchmarking, we have set up a discussion group, also available through our new website. Additionally, the website contains a blog section to allow EEMBC members to provide more in-depth explanations and analysis relative to their CoreMark results."
An EEMBC(R) EnergyBench(TM) enabled version of CoreMark is available to all EEMBC members and may also be licensed separately by non-member companies. EnergyBench(TM) provides data on the amount of energy a processor consumes while running EEMBC's performance benchmarks. Further information on EnergyBench is available at eembc.org/benchmark/power_sl.php.
About EEMBC
EEMBC, the Embedded Microprocessor Benchmark Consortium develops benchmark software that helps processor architects and embedded system designers better understand the capabilities of embedded microprocessors and the systems in which they are used. Currently available benchmark software allows users to predict unicore and multicore processor performance and its associated energy cost in digital entertainment, digital imaging, networking, and office automation applications. Additional suites address automotive, embedded Java, and telecom applications. The consortium's operations include an EEMBC Technology Center that provides a full range of benchmarking and benchmark score certification services in addition to serving as EEMBC's R&D center for benchmark software development.
EEMBC's members include AMCC, AMD, Analog Devices, ARM, Broadcom, Cavium Networks, Centaur Technology , Code Sourcery, Cypress Semiconductor, esmertec, Faraday, Freescale Semiconductor, Fujitsu Microelectronics, Green Hills Software, IAR Systems AB, IBM, Imagination Technologies, Infineon Technologies, Intel, LSI, LynuxWorks, Marvell Semiconductor, MediaTek, Mentor Graphics, Microchip Technology, MIPS Technologies, National Instruments, NEC Electronics, Nokia, NXP Semiconductors, OKI Semiconductor, Open Kernel Labs, Qualcomm, Realtek Semiconductor, Red Hat, Renesas Technology, RMI, Samsung Electronics, Sony Computer Entertainment, ST Microelectronics, Sun Microsystems, Texas Instruments, Toshiba, VirtualLogix, VMware, and Wind River Systems.
EEMBC is a registered trademark of the Embedded Microprocessor Benchmark Consortium. All other trademarks appearing herein are the property of their respective owners.
CONTACT: Markus Levy, +1-530-672-9113 (voice), +1-530-672-9439 (fax), markus.levy@eembc.org, of Embedded Microprocessor Benchmark Consortium; or Bob Decker, Wall Street Communications, +1-415-409-0233 (voice), +1-650-618-1512 (fax), bob.decker@wallstcom.com, for Embedded Microprocessor Benchmark Consortium
