Traffic Management System addresses triple play services.
Press Release Summary:
Based on Virtex(TM)-4 FPGA, Traffic Manager enables QoS support and efficient bandwidth sharing when sending voice, video, and data simultaneously over converged IP network. It supports throughput from 50 Mbps to 10+ Gbps, 2-1.2 million queues, 1-5 levels of scheduling, and 1-64K multi-cast groups. System includes algorithms for policing, shaping, scheduling, and congestion avoidance and control. Embedded BlockRAM and variety of SRAM/DRAM memories are supported.
Original Press Release:
Xilinx Introduces Industry's Most Scalable and Flexible Traffic Manager Solution for Triple Play Applications
New Solution Enables QoS Support and Efficient Bandwidth Utilization in 10G Metro, Broadband Access, and Wireless Systems
SAN JOSE, Calif., March 29 / -- Xilinx, Inc. (NASDAQ:XLNX) today introduced its latest programmable solution to address the increasing consumer demand for triple play services. The Virtex(TM)-4 FPGA based solution, jointly-developed with Modelware Inc., provides product developers with a high-performance, scalable and flexible approach to integrating advanced traffic management features into networking infrastructure equipment. By using the traffic manager solution, equipment vendors can quickly deliver cost-optimized products which ensure Quality of Service (QoS) and efficient bandwidth sharing when sending voice, video, and data simultaneously over a converged IP network.
Key benefits of the hardware-based traffic manager include high performance throughput support from 50 Mbps to 10+ Gbps, allowing the solution to be used in high-end equipment such as metro core routers and in wired and wireless access equipment such as PON OLTs and WiMAX base stations. Scalability and flexibility are provided through its support for 2 to 1.2 million queues (256K queues/level maximum), 1 to 5 levels of scheduling, and 1 to 64K multi-cast groups. The solution also supports a diverse set of algorithms for policing, shaping, scheduling and congestion avoidance and control. To achieve high integration and cost optimization, the traffic manager can be combined with custom logic, embedded IBM PowerPC(TM) processors and multi-gigabit transceivers to provide a total custom solution. The traffic manager supports multiple memory configurations consisting of embedded BlockRAM and a variety of external SRAM/DRAM memories. This allows for the most optimized hardware implementation in terms of cost and performance.
"The ability to deliver traffic management functions such as queuing, scheduling, policing, and congestion control exactly to a unique specification is critical to equipment OEMs as this ultimately determines if a system can guarantee QoS," said Erich Goetting, vice president and general manager of the Advanced Products Division at Xilinx. "By using our Virtex-4 based traffic manager, designers get a solution which delivers throughput and functionality without compromise and allows rapid deployment of competitive and cost-effective triple-play equipment."
"The accelerating trend towards convergence is making packet processing and the ability to ensure IP QoS an increasingly mainstream requirement in communications infrastructure equipment ranging from broadband access to metro core and wireless," said Bob Wheeler, senior analyst at The Linley Group. "We anticipate the market for packet processing silicon to grow significantly over the next few years as IP continues to displace ATM. By providing a high-performance, scalable and flexible traffic management solution, Xilinx is well-positioned to address the increased demand for triple play services."
Pricing and Availability
The Traffic Manager design is fully supported and is immediately available under a standard licensing agreement. The customized solution includes design files, software drivers, test benches and complete documentation. Interested customers can register for access to the datasheet, sizing information, and pricing at xilinx.com/qos.
About Xilinx Virtex-4 Platform FPGAs
Manufactured using the world's first triple-oxide 90nm CMOS technology with 11-layer metal interconnect, Virtex-4 devices represent a quantum leap in programmable device architecture, technology, and system design capabilities. With more than 100 technical innovations, the Virtex-4 family consists of 17 devices and three domain-optimized platforms; Virtex-4 LX FPGAs optimized for logic-intensive designs, Virtex-4 SX FPGAs optimized for high-performance signal processing, and Virtex-4 FX FPGAs optimized for high-speed serial connectivity and embedded processing. Devices are shipping now. For more information on the Virtex-4 product family, visit xilinx.com/virtex4.
About Xilinx
Xilinx, Inc. is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.
CONTACT: Tamara Snowden of Xilinx North America, +1-408-879-6146, or
tamara.snowden@xilinx.com
