System provides lithography-aware design inspection.
Press Release Summary:
Suited for 90 nm and below designs where lithography process windows are extremely small, DesignScan enables inline inspection of post-RET reticle designs for errors through process window. It lets users identify and optimize design-related performance and yield-limiting patterns before committing design to mask production. DesignScan inspection can be run across full process window at arbitrarily chosen focus exposure points employing single calibration.
Original Press Release:
New Lithography-Aware Design Inspection Solution from KLA-Tencor Speeds Time-to-Market, Improves Device Yield
DesignScan Finds All Defect Types at All Focus and Exposure Conditions Before the Mask Design Is Committed to Manufacturing
SAN JOSE, Calif., Oct. 4 / -- KLA-Tencor (NASDAQ:KLAC) today formally unveiled DesignScan -- the industry's first full-chip process window inspection system for post-RET (resolution enhancement technology) reticle design layout inspection. DesignScan enables chipmakers to reduce the number of mask design respins needed to achieve a high-yielding design, resulting in better parametric design performance and faster time-to-market. Leveraging DesignScan, design-related performance and yield-limiting patterns can be identified and optimized before committing the design to mask production. DesignScan is especially suited for 90-nm and below designs, where lithography process windows are extremely small and problematic. Several leading integrated device manufactures (IDMs), foundry, and fabless chipmakers are currently evaluating DesignScan.
DesignScan enables inline inspection of post-RET reticle designs for errors through the process window. Along with LithoView, a new capability specifically developed to enhance collaboration between foundries and fabless chipmakers, DesignScan identifies performance and yield-detracting patterns and facilitates the communication of this information upstream to the fabless design community. LithoView enables fabless designers to view the inspection results obtained by DesignScan. DesignScan enables the performance of the design through the process window to be improved by optimizing the design for the wafer lithography process, optimizing the post-RET reticle layout for the lithography process, or optimizing the lithography process for the design.
"Design-for-manufacturing (DFM) is an issue of ever-greater importance as mask layouts deviate further and further away from designer intent," stated Harold Lehon, general manager of KLA-Tencor's Reticle and Photomask Inspection Division (RAPID). "As a company dedicated to yield management, KLA-Tencor is committed to enabling companies to make better decisions and improve their yields at all levels of the semiconductor value chain. With solutions like DesignScan, we're able to move our yield knowledge and expertise upstream to the post-RET design stage."
Lithography today requires the addition of extremely complex RETs, such as OPC features, to mask layouts in order to achieve successful patterning. After OPC is added to the design, it must be inspected to ensure it is free of design errors that can lead to patterned defects, as well as to ensure it provides a reasonable process window for a specific design in a given process, before the mask is made. Detecting these errors as early as possible is critical, since a design error found before mask production may take a few days or a week to correct, yet an error that goes unchecked until wafer inspection in the fab can result in one or more months of cycle time delay. DesignScan offers the fastest turnaround time for process window inspection and optimization.
"Systematic yield loss is on the rise due to the increased complexity associated with next-generation IC designs," stated Chris Mack, vice president of lithography at KLA-Tencor and one of the early program managers for DesignScan. "The largest opportunity for yield improvement exists in lithography where design layout and RET/OPC have not been optimized to account for variations in focus and exposure. It's not enough for chipmakers to understand how the design yields at best focus and exposure. To get the tightest possible distribution of parametric yield, design inspection across the entire lithography process window is needed."
Physics-based modeling for greater accuracy and reduced calibration burden DesignScan is built on a reliable imaging computer platform that has been field proven and implemented across several of KLA-Tencor's leading-edge inspection systems. It utilizes physics-based models to accurately simulate how the design will be transferred to the reticle layer and how that reticle will be imaged into the resist. The simulated images are then compared to the desired designed patterns, and defect detection algorithms are applied to determine if any unacceptable variation in the pattern occurs within or beyond the nominal process window.
Leveraging KLA-Tencor's expertise in lithography simulation, DesignScan utilizes a unique and proprietary calibration methodology. DesignScan inspection can be run across the full process window at arbitrarily chosen focus exposure points employing a single calibration. An 8-mm x 8-mm wafer scale reticle layout can be inspected across nine focus exposure points in approximately two hours. In contrast, existing OPC and verification empirical models must be calibrated at each focus-exposure condition. DesignScan's proprietary calibration process and physics-based modeling result in significantly reduced calibration burden for the user and superior model accuracy. In addition, unlike empirical models, the DesignScan models do not need to be recalibrated for a change in the design polygons or the RET applied to the design. Further small process changes, such as a new stepper numerical aperture (NA) setting, do not require recalibration of the models. For a typical design, DesignScan inspection can cost less than $500 and the inspection can be performed concurrently with the mask tape out process. KLA-Tencor's expertise in defect review and dispositioning are also brought to bear through a proprietary context-based defect binning model that can sort and prioritize defects for improved review efficiency and faster root-cause analysis.
KLA-Tencor is now taking orders for DesignScan.
KLA-Tencor will showcase DesignScan at the 25th Annual BACUS Symposium on Photomask Technology, October 4-5, at booth #305 at the Monterey Convention Center, Monterey, Calif. DesignScan will also be showcased at the 2005 Fabless Suppliers Expo and Conference, October 5-6, at booth #411 at the San Jose McEnery Convention Center, San Jose, Calif.
About KLA-Tencor: KLA-Tencor is the world leader in yield management and process control solutions for semiconductor manufacturing and related industries. Headquartered in San Jose, Calif., the company has sales and service offices around the world. An S&P 500 company, KLA-Tencor was named one of the Best Managed Companies in America for 2005 by Forbes Magazine and is the only company in the semiconductor industry to receive the accolade for this year. KLA-Tencor is traded on the Nasdaq National Market under the symbol KLAC. Additional information about the company is available on the Internet at www.kla-tencor.com/ .
CONTACT: Uma Subramaniam, Director, Corporate Communications of KLA-Tencor, +1-408-875-5473, or uma.subramaniam@kla-tencor.com
