Press Release Summary:
Model SCG6500NT high precision phase lock loop frequency translator provides synchronization for TDM, PHD, SONET, and SDH network equipment. Generator provides digital PLL control and low jitter LVPECL differential outputs. Switching between reference input signals can be accomplished manually or autonomously. Autonomous switching can be revertive or non-revertive. Alarms provide status on loss of reference and loss of lock.
Original Press Release:
Connor-Winfield's New SCG6500NT Synchronous Clock Generator Provides Digital PLL Control and LVPECL Differential Outputs
The new Connor-Winfield low jitter LVPECL Synchronous Clock Generator Model SCG6500NT is a high precision phase lock loop frequency translator that provides designers the reliable performance they need to optimize the performance of their telecom network equipment.
The SCG6500NT provides a system designer with the following LVPECL differential outputs: One 622.08 MHz<.8 ps jitter; One 155.52 MHz<1 ps jitter; and Two 77.76 MHz<4 ps jitter, as well as an 8 kHz. Switching between reference input signals can be accomplished either manually or autonomously. And, autonomous switching can be either revertive or non-revertive.
Modules in the SCG6500NT series are well suited for OC-48/OC-192 line cards, SERDES, and service termination cards to provide synchronization for TDM, PHD, SONET, and SDH network equipment.
Performance Advantage: The module is mounted using a 100 pin, high speed differential connector. The modules extremely low jitter helps increase overall performance and preserve signal strength and clarity.
Features of the new SCG6500 include:
- Digital PLL Control
- 622.08 MHz LVPECL Output, Ultra-low Jitter
- 155.52 MHz LVPECL Output, Ultra-low Jitter
- Two 77.76 MHz LVPECL Outputs, Low Jitter
- 8 kHz LVPECL Output
- Dual 8 kHz Input References
- Supports Manual and Autonomous Modes
- 3.3 VDC Power Supply
- Alarms Provide Status on Loss of Reference and Loss of Lock
For more information contact Connor-Winfield Corp.