Serial Interconnect Protocol has flexible architecture.

Press Release Summary:



Optimized for Stratix® II GX device family, SerialLite II point-to-point serial interconnect protocol is based on 8b/10b encoding, scalable from 1-16 lanes at 622 Mbps to 6.375 Gbps per lane, for chip-to-chip, board-to-board and backplane applications. Protocol's architecture supports full-duplex (symmetric), simplex, asymmetric, and broadcast operation as well as streaming or packet data. Applications include voice, data, and video communication.



Original Press Release:



Altera Releases SerialLite II Protocol Optimized for Stratix II GX FPGAs



Second-Generation Serial Protocol Extends Flexibility, Increases Performance and Offers Substantial Cost Savings

San Jose, Calif., November 14, 2005-Altera Corporation (NASDAQ:ALTR) today announced the release of SerialLite II, a lightweight serial interconnect protocol for chip-to-chip, board-to-board and backplane applications. Optimized for the Stratix® II GX device family, the SerialLite II protocol builds on the success of the first-generation SerialLite protocol by supporting a performance range of 622 Mbps to 6.375 Gbps while reducing logic requirements by an average of 65 percent. SerialLite II delivers a low-cost serial interconnect solution for a wide array of applications, including voice, data and video communication, test and medical, defense, industrial, high-end computing and data storage.

"We worked very closely with our original SerialLite customers to define and develop this second-generation serial protocol," said Justin Cowling, Altera's director of IP marketing. "By understanding the unique requirements of different applications over a widening range of performance points, we were able to define a low-latency, low-overhead protocol with a wider set of configurable features to drive down implementation costs for each customer."

About SerialLite II
SerialLite II is a point-to-point serial interconnect protocol based on industry-standard 8b/10b encoding, scalable from 1 to 16 lanes at 622 Mbps to 6.375 Gbps per lane, for chip-to-chip, board-to-board and backplane applications. The protocol includes a flexible architecture to support full-duplex (symmetric), simplex, asymmetric and broadcast operation, and support for either streaming or packet data. For more information on SerialLite II, including the protocol specification, visit www.altera.com/seriallite2.

Pricing and Availability
The SerialLite II interconnect protocol is available as a MegaCore® function which can be downloaded from Altera's website. (www.altera.com/seriallite2download) A perpetual license for the MegaCore including one year of upgrades and support is bundled with each subscription of the Quartus® II design software. The annual subscription for the Altera design software is $2,000 for a node-locked PC license.

About Stratix II GX FPGAs
The 90-nm Stratix II GX family is Altera's third generation of FPGAs with embedded transceivers. The family is part of a complete programmable solution from Altera aimed at the growing number of applications and protocols requiring high-speed serial interconnect. Stratix II GX devices share the same groundbreaking architecture as Altera's high-density Stratix II FPGAs and integrate up to 20 serializer/deserializer (SERDES)-based transceivers. For more information about Stratix II GX FPGAs, please visit www.altera.com/stratix2gx.

About Altera
Altera Corporation (NASDAQ:ALTR) is the world's pioneer in system-on-a-programmable chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com.

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