SERDES IP achieves 10 Gbps on consumer electronic cables.

Press Release Summary:



With SERDES IP, customers can use cables with SERDES at either end to recover and retime signal. Pin-configurable macro uses standard CMOS logic process devices and exhibits optimal input sensitivity, jitter tolerance, and equalization. With 0.095 mm² active silicon area per lane, IP is suitable for variety of flip-chip and wire-bound packages embedded in connectors. Serial client interfaces can connect directly to SFPs and operate over frequencies from 125 Mbps to 12.5 Gbps.



Original Press Release:



Analog Bits SERDES Achieves 10Gbps on Consumer Electronic Cables



Performance reduces BOM, power and package costs while driving higher data-rates

MOUNTAIN VIEW, Calif., -- Analog Bits, the Integrated Clocking and Interface IP leader, unveiled a new cable-specific SERDES IP specifically targeting the cost-sensitive, yet performance demanding consumer cable market.

The latest addition to the Analog Bits SERDES IP product line allows customers to use low cost cables with SERDES at either end to recover and retime the signal and has been demonstrated with multiple cables including FFC ribbon, Micro-Coax and Dual-Coax.

"Cable cost is a critical consideration for our consumer electronics customers," explains Mahesh Tirupattur, Executive Vice President, Analog Bits, "Our SERDES IP offers unique low power capability that improves signal integrity with incredibly low bit-error-rate."

The pin-configurable macro uses standard CMOS logic process devices and exhibits exceptional input sensitivity, jitter tolerance and sophisticated equalization. Its low pin count, low power and compact form factor - 0.095 mm2( )active silicon area per lane - make it suitable for a variety of flip-chip and wire-bond packages embedded in connectors. The serial client interfaces can connect directly to SFPs and operate over a wide range of frequencies from 125 Mb/s up to 12.5 Gb/s.

All Analog Bits' Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protocol market needs including a wide range of AC-coupled high-speed serial communication standards requiring serial Clock Data Recovery (CDR).

Analog Bits' proprietary and industry leading PLL technology, in combination with sophisticated circuit techniques and innovative I/O design makes this macro an extremely area and power efficient solution. The PMA can be integrated with the available PCS to provide a PCI-Express Gen1/Gen2/Gen3 PHY solution, and has interface capability to allow integration with other customer-designed serial protocol PCS layers.

For more information visit www.analogbits.com/serdesCable.htm or email us at: info2011@analogbits.com

About Analog Bits: Founded in 1995, Analog Bits, Inc. is the leading supplier of low-power, customizable analog IP for easy and reliable integration into modern CMOS digital chips. Our products include precision clocking macros such as PLLs & DLLs, programmable interconnect solutions such as multi-protocol SERDES/PMA and programmable I/Os as well as specialized memories such as high-speed SRAMs and TCAMs. With billions of uses of IP fabricated in customer silicon from 0.35-micron to 28-nm processes, Analog Bits is the premier analog IP supplier with an outstanding heritage of "first time working silicon" at merchant foundries and IDMs.

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