Programmable SerDes IP supports flat panel displays. .

Press Release Summary:



Integrating low power macro with low-jitter video clock, Display SerDes supports V-by-One HS® standard. Unit is configured as 8-lane octal transmit macro that fits in 0.44 mm² and features low power of 4.5 mW/Gbps/lane running at 3.75 Gbps. Device offers test and configuration support for ac-JTAG, power-down modes, and PLL bypass modes. Suitable for variety of wire-bond packages, SerDes comes in customized configuration widths, metallization scheme, and pad structures.



Original Press Release:



New Analog Bits Display SerDes Reduces Footprint, Power & Cost



Saves up to 700 milliwatts on Flat Panel Display SOCs

MOUNTAIN VIEW, Calif., -- Analog Bits, the Integrated Clocking and Interface IP leader, today unveiled an application specific Display SerDes (Serializer/Deserializer) IP that reduces area by up to 25 times, die-costs up to 25% and power consumption by 700mW. The new IP is silicon-proven and available immediately.

The Analog Bits Display SerDes is designed specifically for next generation flat panel displays, integrating a low power macro with a fine resolution, low jitter video clock to drive new video standards such as V-by-One HS®.

Analog Bits has achieved these technology milestones by customizing the IP's analog macro to market specifications. The Display SerDes can now be successfully ported to 90nm 65nm and 40nm designs.

One of the key Display SerDes' features is its ability to maximize the V-by-One standard. V-by-One HS is a low power interface display chip standard from THine Electronics, Inc. that reduces power, lowers component costs and extends connection ranges. Major display manufacturers worldwide have adopted V-by-One HS. Analog Bits innovative programmable approach aligns with V-by-One and other video interface standards making it ideal for a wide variety of flat panel display applications.

"Our clocking and interconnect products have long held a reputation for high quality - especially in video," commented Mahesh Tirupattur, Executive VP of Analog Bits.

"Integrating our new low-power, high-bandwidth SerDes has resulted in a compelling solution for this growing market."

For information on the Display SerDes, please visit www.analogbits.com/displaySERDES.php

About Analog Bits: Founded in 1995, Analog Bits, Inc. is the leading supplier of integrated timing and interconnect IP. Products include precision clocking macros such as PLL's & DLL's, programmable interconnects such as multi-protocol SERDES/PMA and programmable I/O's as well as specialized memories such as high-speed SRAMs and T-CAMs. With billions IP fabricated in customer silicon from 0.35-micron to 28-nanometer processes, Analog Bits has the heritage of "first time working silicon" at merchant foundries and IDMs. For more information visit www.analogbits.com

V-by-One HS® is a registered trademark of THine Electronics, Inc.

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