BANGALORE and FREMONT, California - The Key Demonstrations Include HEVC Encoder and Decoder on Intel Server Class Platform and on Texas Instruments Multi-Core DSP Platform, and HEVC Decoder on ARM-based SoCs and Xilinx FPGA.
PathPartner Technology, a leading provider of embedded multimedia software services and solutions, is taking huge steps towards real-time performance for UHD video. We will be introducing latest generation HEVC solutions on Intel server class platform which supports UHD resolution, real-time encoding and decoding up to 60 fps with bit rate of 16-20 Mbps range utilizing multi-core x86 architecture. And our universal HEVC decoder implementation supports robust error resiliency and error concealment techniques. PathPartner is working on improving the quality and performance of both encoder and decoder further to achieve optimized video delivery. We also offer end-to-end solutions for various video applications.
Our HEVC encoder and decoder solution on TI multi-core C66x DSP platform supports HEVC Main profile and Main Still profile encoding and decoding of 1080p at the rate of 60fps and 2160p at the rate of 30fps. Apart from this, our solution provides remarkable performance scalability based on number of DSP cores available
- 720p60 and 1080p30 Main Profile at the rate of 6Mbps using 16 DSP cores
- 1080p60 Main Profile at the rate of 4Mbps using 16 DSP cores for video
- 1080p60 Main Profile at the rate of 8Mbps using 32 DSP cores
- 3840x2160p30(UHD) at the rate of 12Mbps using 64 DSP cores
- 1080p60 Main Profile at the rate of 8Mbps using 8 DSP cores
- 3840x2160p30(UHD) at the rate of 16Mbps using 16 DSP cores
PathPartner's software solution for HEVC decoder on ARM takes advantage of the full capabilities of mobile SoCs built on latest ARM processors. The solution can perform real-time decoding of 1080p at the rate of 60 fps and 2160p at the rate of 24fps video streams on quad core Cortex-A15 running at 2.3 GHz. The design fully leverages the media capabilities of the NEON SIMD engine and multi-threading, to exploit data and functional parallelism on ARM Cortex-A CPU cores. The decoder implementation is load balanced and scalable across single and multi-core (up to octal-core) devices.
In addition, we are also demonstrating hybrid HEVC decoder partitioned optimally into ARM Cortex-A9 Software and FPGA Hardware on Xilinx Zynq-7000 series All Programmable SoCs. Our hybrid HEVC Decoder runs on a single chip delivering low power consumption and also the flexibility to integrate custom hardware blocks in the FPGA fabric on the same chip, thereby reducing overall system cost. Compared to pure hardware implementations that run on high-end FPGAs, this hybrid decoder uses the ARM CPU of Programmable SoC devices for highly sequential code like CABAC and hence uses less FPGA resources reducing power consumption and lowering cost. Since our HEVC decoder uses less FPGA resources, remaining hardware can be used to integrate external display interfaces like DisplayPort, SD/HD/3G-SDI, LVDS for single or multi-panel displays for displaying the decoded video from the same chip.
Our flexible business model and focus on performance and quality has enabled our customers to deploy our HEVC solutions and we are absolutely overwhelmed to announce our products at NAB this year in Las Vegas. Visit our Booth South Upper Hall, SU10826.
OEMs looking for licensing of these solutions can reach out to firstname.lastname@example.org or email@example.com
About PathPartner Technology:
PathPartner Technology, based out of California, USA and Bangalore, India is a leading provider of products and services for multimedia centric devices. PathPartner has extensive experience in technology, engineering business practices focusing on audio video codecs, video analytics & vision, imaging, multimedia middleware, OS porting, system integration, applications and hardware design. We offer system solutions and services for multimedia centric embedded devices.
For more information visit: http://www.pathpartnertech.com
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