MCU delivers 62.5 nsec response time.
Press Release Summary:
Ultra low power 32 MIPS 8/16-bit XMEGA microcontroller family with 8-channel event system and 4-channel DMA controller allows up to 8t inter-peripheral signals and up to four 64 Mbps data transfers to occur simultaneously, while CPU is in idle sleep mode. No context switching or interrupts are required, and XMEGA(TM) draws just 11 mA at 32 MHz to execute tasks. Other features of 8-bit CPU include 32 general purpose registers and support for 16- and 32-bit arithmetic.
Original Press Release:
Atmel Launches 100 nA XMEGA MCU with 62.5 nS Response Time
8-channel event system and 4-channel DMA allow zero-cycle ADC, DAC, & data transfers. Handles up to 8 zero-latency events simultaneously without CPU intervention.
Includes 32-bit RTC with 500 nA current consumption and 800 nS battery backup switching time.
ESC Boston, MA, October 27, 2008 - Atmel® Corporation, announced today its ultra low power, 32 MIPS 8/16-bit XMEGA microcontroller family with 8-channel event system and 4-channel DMA controller that allow up to eight inter-peripheral signals and up to four 64 Mbps data transfers to occur simultaneously, while the CPU is in idle sleep mode. No context switching or interrupts are required, and the XMEGA(TM), draws just 11 mA (at 32 MHz) to execute all these tasks. A conventional MCU would require 1600 MIPS and consume 960 mA executing the same tasks, due to extensive context switching and interrupt usage.
The event response time in XMEGA is as low as to 31.25 nS - 80 times faster than a conventional 8-bit MCU and up to 20 times faster than a 32-bit MCU. The maximum response time is only 62.5 nS.
Event system guarantees 62.5 nS response time, conserves power. The XMEGA allows autonomous and instantaneous peripheral-to-peripheral interaction to be triggered by timer/counter compare match or overflow, analog comparator toggle, pin change, ADC complete or compare, and real time counter overflow. These events can trigger actions in other peripherals that include ADC or DAC conversion, input capture to time stamp communication or ADC measurements, external frequency or pulse-width measurements, clocking of timer/counters, starting a DMA transaction, or changing a pin output. The triggering of events and resulting actions in the XMEGA are fully configurable in software. They can be kept static and locked, or can change dynamically during various stages of the application execution.
By avoiding interrupts that increase power consumption and software overhead, the XMEGA MCU handles a single event at less than 10 nA. Critical tasks are handled within 2 clock cycles (62.5 nanoseconds at 32 MHz).
Flexible 4-channel DMA controller - The XMEGA features a 4 channel direct memory access (DMA) controller that can move data between any locations in the data memory space. Data can be moved from a peripheral register to internal or external SRAM/SDRAM, between SRAM locations, and even between peripheral registers directly. The special ability to move data directly between all peripherals, and to access all peripherals such as I/O pin registers help XMEGA to achieve higher system performance and lower power consumption than other MCUs with DMA controller. Each DMA channel has individual priority, source, destination, triggers and addressing modes. They can transmit from 1 byte to 16 Mbytes in a single transaction. The large data transfer size is possible due to the simple linear data memory address space in the AVR®, and auto increment/decrement and reload features in the DMA controller. The DMA controller in XMEGA handles data transfer without any CPU intervention. It enables both higher performance and lower power consumption than solutions without DMA controller for embedded applications that include data transfer.
With the event system and DMA controller in XMEGA, a pin-change on any I/O pin or overflow on any timer/counter can trigger ADC conversions. The result is transferred over a DMA channel to the SRAM. At the same time, a second timer/counter can trigger high speed DAC conversions that use a second DMA channel for data. The event system can make the analog comparator trigger input capture for 100% accurate time stamps, automatic capture to time stamp the beginning of communication transactions, or ADC conversion scans on the second ADC. The remaining four event channels and two DMA channels are available for fault protection of a PWM output controlling a high voltage driver stage, cascading of timer/counters, and a couple of communication channels and -all at the same time, all while the CPU is sleeping.
The XMEGA handles up to 256 Mbps data transfer and 8 simultaneous events in idle sleep mode, at 0 MIPS drawing only 12 mA. A conventional 8- or 32-bit MCU would need as many as 1600 MIPS (1) and would consume between 960 mA and 640 mA(2) just to execute these tasks.
Only 8-bit CPU with 32 general purpose registers and support for 16- and 32-bit arithmetic. The AVR CPU in Atmel's AVR XMEGA is the industry's only 1 MIPS/MHz, 8-bit CPU with 32 general purpose registers that increase processing performance and reduce data bus access. The arithmetic logic unit (ALU) supports 16- and 32-bit arithmetic and 24-bit memory pointers give a 16 Mbyte linear address space with no need for paging. The 32 general purpose registers are connected directly to the ALU. By doing this, local variables can be kept in the register file, eliminating the need for SRAM access during data processing. In a single clock cycle, the AVR CPU can feed two arbitrary registers from the register file to the ALU, do a requested operation, and write back the result to any register. Traditional single-accumulator CPUs spend up to 30% of their time moving data between the SRAM and the accumulator. The AVR instruction set is optimized for C and high level languages, resulting in code size that is typically 20-50% smaller than that of competing 8- or 16-bit CPUs.
500 nA RTC with fail safe battery backup. The XMEGA employs Atmel's ultra low-power, low leakage picoPower technology. It consumes 100 nA in sleep mode with full SRAM retention and wake-up from I/O pin change with 5 uS wake-up time. This means that XMEGA can wake up and continue to execute from where it stopped without having to reboot. Activating the on-chip Real Time Counter (RTC) running from a 32.768 kHz crystal oscillator results in only 500 nA power drain - the industry's lowest. The Brown Out Detector and Watchdog Timer have a combined current consumption of only 1uA, allowing these safety features to remain on in deep sleep mode with minimal power penalty.
Battery backup. The XMEGA A3B derivative includes a battery backup system for applications that rely on a continuous precise time. If power is lost, the XMEGA A3B automatically switches the power source to the backup battery within 800 nS, ensuring continuous operation of the RTC and crystal oscillator, even when the power loss is instant. The XMEGA A3B automatically detects crystal oscillator failure and low battery backup voltage to further protect the system. Unlike other microcontrollers, a fail-safe, low-power battery backup system with XMEGA A3B can be realized without external components.
The low leakage picoPower technology in XMEGA A3B eliminates the need to power down the device to conserve power. As a result the backup battery is never needed unless power is actually lost. One 30 mAh coin cell battery will provide ten years of backup power in an XMEGA A3B based system, compared to maximum three years for non-picoPower MCUs which have much higher leakage current.
On-chip, export-authorized cryptographic engine. XMEGA microcontrollers are the only 8/16-bit devices with an on chip AES and DES hardware cryptographic engine for the encryption/decryption of secure bootloaders and communication. The XMEGA executes the Advanced Encryption Standard (AES) algorithm in 375 clock cycles per 16-byte block, enabling 1 Mbps-plus secure communication. The Data Encryption Standard (DES) executes at 16 clock cycles per 8-byte block, enabling 2 Mbps and higher secure communication. This is ideal for wireless low power applications. XMEGA MCUs with cryptographic engine are authorized for export to all countries except Cuba, Iran, Libya, North Korea, Syria, and Sudan (Export Control Classification Number (ECCN) 5A002A.1).
Fast 12-bit ADCs and DACs. XMEGA is the industry's only 8-16-bit MCU with two 8-channel, 12-bit analog-to-digital (ADC) converters, each with a 2 Mbps conversion rate - the fastest 12-bit ADCs in any standard MCU. Support for oversampling makes it possible to measure a 125 kHz signal with 14-bit resolution. The two 12-bit digital-to-analog converters (DACs) with up to 1 Msps conversion rate support applications that require analog output for instrument calibration, actuator input, sound and speech interface without external filter components. The XMEGA has up to four analog comparators where 16 I/O pins, DAC output and a 64 level VCC voltage scaler to be used as inputs. The comparators can be used in window mode to check if an input signal is inside, above or below a voltage window.
High Bandwidth Peripherals. XMEGA A3B devices have six 16-bit timer/counters, each with two or four double buffered output compare or input capture channels, and supporting up to 128MHz PWM from an internal PLL. One timer/counter also supports advanced features for safe and easy driving of inverters, motors and other applications using PWM drives. Communications peripherals include six USARTS, one of which has optional 115.2 kbps IrDA® modulation/demodulation, two IsquaredC and SMBus(TM) compatible two-wire interfaces (TWI) with dual address match, and two serial peripheral interface (SPI) peripherals. A fractional baud rate generator allows the designer to use any available clock source to generate all standard baud rates for the UART. The internal RC oscillators in XMEGA have ±1% accuracy over temperate and voltage help to remove crystal oscillators in many applications where also communication is needed.
Unique binary code compatibility. XMEGA use the same powerful AVR CPU as all existing tinyAVR® and megaAVR® MCUs. This enables AVR to cover the complete 8- and 16-bit market with one single, compatible product family with a wide variety of features, pin counts and memory sizes.
All XMEGA MCUs are pin and 100 percent code-compatible across all devices from the smallest to the largest. Designers can develop with any XMEGA device, and switch to any other XMEGA device later without having to change their code. Engineers only need to keep and maintain one code base, which can be re-used across multiple projects. The result is a much faster development and prototyping cycles with shorter time to market.
Development Tools - All AVR XMEGA devices are supported by AVR Studio®. This integrated development environment supports all AVR MCUs - from the smallest 8-pin, 1kB tinyAVR to the largest 100-pin 256KB megaAVR and 384KB XMEGA device. It is available free of charge on Atmel's web site. IAR's Embedded Workbench® and the free GNU GCC compiler also support XMEGA. Debugging tools include Atmel's AVRONE!, JTAGICE mkII, and the STK®600 Starter Kit. These tools also support all other AVR and AVR32 UC3 products.
Availability and Pricing
Samples of the XMEGA devices are available now with flash memory density from 864 KB to 256 KB in 64 to 100 pin packages. Pricing varies from $1.75 to $5.00 depending on volume quantity and memory option.
Footnote:
(1) 64 Mbps x 4 dma channels, 50 cycles to handle each byte of data
(2) 1600 MIPs, 0.6 mA/MHz for 8- and 16-bit and 0.4 mA/MHz for newer 32-bit MCUs
Information:
AVR Studio is available free of charge from Atmel's web site, www.atmel.com
Introduction videos are available at http://www.avrtv.com/2008/07/
About Atmel
Atmel is a worldwide leader in the design and manufacture of microcontrollers, advanced logic, mixed-signal, nonvolatile memory and radio frequency (RF) components. Leveraging one of the industry's broadest intellectual property (IP) technology portfolios, Atmel is able to provide the electronics industry with complete system solutions focused on consumer, industrial, security, communications, computing and automotive markets.
