LC Tank PLL IP targets high-end networking SoCs.
Press Release Summary:
Achieving less than 300 fs-RMS random jitter performance, high-precision LC Tank PLL IP is intended for SoC applications running at data transfer rates of 100 Gbps and greater. It operates on less than 12 mW while providing multiphase clocks of up to 14 GHz in less than 0.26 mm² footprint. Silicon-proven in TSMC's 40 nm General Purpose (G) process, solution incorporates components such as process-specific inductors to achieve optimal precision.
Original Press Release:
Analog Bits Low Jitter LC Tank PLL IP Targets Ultra High End Networking, Cloud Computing SoC's
Less than 300fs-RMS random jitter performance achieves "next level" precision
MOUNTAIN VIEW, Calif. -- Analog Bits, the Integrated Clocking and Interface IP leader, today announced immediate availability of a new high-precision, low jitter LC Tank PLL IP for System-on-Chip (SoC) applications running at 100 Gigabits per second (Gbps) and above data transfer rates.
This new addition expands Analog Bits' Clocking IP product line of PLLs which will now enable SoC designs for very high-end telecommunications and networking applications that are helping expand the cloud computing market.
Positioned for high fidelity, low jitter sampling and transmission applications, the new LC Tank PLL operates on less than 12 milliwatts (mW) while capable of providing multiphase clocks of up to 14 Gigahertz (GHz) in a footprint tinier than 0.26 square millimeters (mm).
"Extremely low jitter PLLs, such as Analog Bits' 300fs-class IP proved extremely critical to the design success of our 28 gigabits per second SerDes that is proving to be a differentiating device cost-effectively targeting 100 Gigabit Ethernet applications," said Norman Young, Vice President of Engineering , Inphi Corporation.
The new LC Tank PLL is silicon prove in TSMC's 40nm General Purpose (G) process and is actively being ported to the foundry's 28nm node. It incorporates special process components, such as process-specific inductors, to achieve its very high precision.
"To achieve better than 300 femtosecond performance is definitely a clocking IP milestone. Putting this in context, 300 femtoseconds is the duration of a vibration of the atoms in an iodine molecule, and a femtosecond is to a second, what a second is to 31.7 million years," explains Mahesh Tirupattur, Executive Vice President, Analog Bits.
For information visit www.analogbits.com or email: info2011@analogbits.com
About Analog Bits: Founded in 1995, Analog Bits, Inc. is the leading supplier of low-power, customizable analog IP for easy and reliable integration into modern CMOS digital chips. Our products include precision clocking macros such as PLLs & DLLs, programmable interconnect solutions such as multi-protocol SERDES/PMA and programmable I/O's as well as specialized memories such as high-speed SRAMs and TCAMs. With billions of uses of IP fabricated in customer silicon from 0.35-um to 28-nm processes, Analog Bits is the premier analog IP supplier with an outstanding heritage of "first time working silicon" at merchant foundries and IDMs.
