Press Release Summary:
- Delivers 6 Gbps per lane for a max throughput of 24Gbps in D-PHY℠ mode and 6Gsps per trio
- Offers built-in test capabilities including PRBS generator and internal loopback
- Supports ALP mode for different applications with long channels
Original Press Release:
Arasan Announces its Next Generation of C-PHY / D-PHY Combo IP Core Compliant with the Latest MIPI Specifications
Arasan Chip Systems, a leading provider of semiconductor IP for IoT, mobile and automobile SoCs, today announced the immediate availability of its MIPI C/D-PHY Combo IP core compliant with the MIPI C-PHY v2.0 and D-PHY 2.5 Specifications.
SAN JOSE, Calif., March 17, 2021 /PRNewswire/ -- Arasan Chip Systems, a leading provider of semiconductor IP for mobile and automobile SoCs, today announces the immediate availability of its MIPI C-PHY℠/ D-PHY℠ Combo IP which is compliant with the latest MIPI C-PHY℠ v2.0 and MIPI D-PHY℠ v2.5 specifications. The upgraded MIPI C-PHY℠ / D-PHY℠ Combo IP is seamlessly integrated with Arasan's own MIPI CSI-2® IP and MIPI DSI® IP as part of Arasan's Total IPTM for MIPI Imaging and Display Solutions. This 2nd generation of Arasan's MIPI C-PHY℠/D-PHY℠ combo IP has been re-engineered for ultra low power consumption leveraging the advantages of the FINFET Technology.
Arasan's MIPI C-PHY℠ v2.0 / D-PHY℠ v2.5 combo IP delivers 6 Gbps per lane for a max throughput of 24Gbps in D-PHY℠ mode and 6Gsps per trio for a max throughput of 41Gbps in C-PHY℠ mode. Other significant feature upgrades include:
- When used with Arasan's MIPI CSI-2 or MIPI DSI-2®, the MIPI C-PHY℠/D-PHY℠ combo IP offers built-in test capabilities including PRBS generator and internal loopback to support cost effective tests for high volume manufacturing.
- New power saving HS-Tx half swing mode for D-PHY℠,
- On-board programmable PLL with Spread Spectrum Clocking, with or without deskew calibrations and equilizations for different operating speeds of D-PHY℠,Power management functions such as reduced HS-TX swing modes and unterminated HS-RX mode.
- It supports ALP Mode for different applications with long channels that enables fast lane turnaround mode to increase bandwidth of communication in the reverse direction of the MIPI link. The ALP mode is key to the CSI-2® Unified Serial Linking capability, which decreases interface wires and helps to allow a more extensive range.
Arasan's MIPI C-PHY℠ v2.0 / D-PHY℠ v2.5 combo IP is available to license immediately. For availability, lead time and purchase of Test Chips (on TSMC FINFET) along with the HDK programmed with our CSI-2 or DSI-2 IP cores, please contact Arasan sales.
Arasan Chip Systems, a contributing member of the MIPI Association since 2005 is a leading provider of IP for mobile storage and mobile connectivity interfaces with over a billion chips shipped with our MIPI IP. Arasan's high-quality, silicon-proven, Total IP Solutions include digital IP, AMS PHY IP, Verification IP, HDK and Software. Arasan has a focused product portfolio targeting mobile SoC's. The term Mobile has evolved over our two decade history to include all things mobile – starting with PDA's in the mid 90's to Smartphones & Tablets of the 2000's to today's Automobiles, Drones and IoT. Arasan is at the forefront of this evolution of "Mobile" with its standards-based IP at the heart of Mobile SoC's.
Over a billion chips have been shipped with Arasan IP including with all of the top 10 semiconductor companies.
Dr. Sam Beal