Press Release Summary:
- Provide support for range of digital serial communications standards with 1 Gbps to 112 Gbps data rates
- Designed for AI/ML, HPC, high-performance network switching for cloud-scale and telco data centers, 5G cellular base stations and edge networking
- SerDes receivers are embedded with advanced DSP techniques such as constant modulus algorithm, adaptive equalization and decision-based adaptation
Original Press Release:
Achronix Demonstrates Silicon Validation Device with 112 Gbps SerDes
112 Gbps SerDes will be used in Achronix's next-generation FPGA devices
SANTA CLARA, Calif., March 27, 2019 /PRNewswire/ -- Achronix Semiconductor Corporation, a leader in FPGA-based hardware data acceleration devices, today announced that it has completed testing and is now demonstrating the 112 Gbps SerDes that will be used in its next-generation FPGAs. Fabricated on TSMC's 7nm FinFET process technology, these 112 Gbps SerDes provide true multi-standard support for a wide range of digital serial communications standards with data rates ranging from 1 Gbps to 112 Gbps.
The results from the 112 Gbps SerDes validation chip show that the transmitter generates clean eye diagrams and exhibits excellent linearity, jitter, and signal-to-noise and distortion ratio (SNDR) with sharp rise and fall times at multiple data rates up to the SerDes' maximum rate of 112 Gbps. The SerDes' receivers employ advanced DSP techniques including constant modulus algorithm (CMA) adaptive equalization and decision-based adaptation to deliver the best possible receiver performance at low power.
"Achronix's 7nm generation data acceleration FPGAs will include the industry's most advanced, high-quality, low-cost and low-power SerDes for high-end data acceleration applications," said Robert Blake, president and CEO of Achronix Semiconductor. "Achronix has shown once again that it can design, build and demonstrate the highest-performance, fully functional semiconductor products on the most advanced processes technology available."
These SerDes are optimized for power efficiency and die size while delivering optimal performance, which is critically important for high-performance applications including artificial intelligence and machine learning (AI/ML), high-performance computing (HPC), high-performance network switching for cloud-scale and telco data centers, 5G cellular base stations, and edge networking. These high-performance applications demand ever-increasing amounts of bandwidth, straining the existing networking infrastructure in data centers, 5G installations, edge systems, and IoT networks.
Early adopters developing equipment and installations for these applications are already installing 400 GbE ports to reduce the amount of cabling needed to meet bandwidth requirements. Very often, these high-speed ports are created by aggregating multiple, lower-speed ports such as ten 40 Gbps or eight 50 Gbps ports. Upgrading to 100 Gbps ports is a sorely needed option to reduce cabling and installation costs. 112 Gbps SerDes reduce lane and port count, current consumption, and heat dissipation, thus reducing the costs associated with building next-generation hyperscale network infrastructures.
The 112 Gbps SerDes on Achronix's silicon validation device are based on Alphawave's AlphaCORE Multi-standard SerDes (MSS) IP and support virtually all data center and telco serial communications standards including the many versions of Ethernet, PCI Express (PCIe), CPRI, and many others.
Said Tony Pialis, Alphawave's founder and CEO, "We are pleased that Achronix is using our latest generation of 112 Gbps long-reach SerDes IP for their next-generation FPGA products. Tier-one companies, creating equipment for data centers and other networking applications, that are starved for bandwidth, wanted to see that we had a compelling, flexible, and robust solution that works in real Silicon. This test chip, developed in partnership with Achronix, demonstrates that we can deliver robust 112 Gbps IP solutions for next-generation data centers."
Alphawave is a team of technology industry veterans and engineers with a nearly 20 year history of building successful Silicon/IP teams. The company's unique, DSP based, multi-standard connectivity Silicon IP solutions leverage years of experience and R&D to build the most power efficient, high performance solution available on the market to enable devices of the future. Founded in 2017, Alphawave has already seen strong success and impact in delivering proven Silicon in leading 7nm process. Profitable since day one, Alphawave is investing heavily in existing and future products. This has already resulted in Alphawave building one of the most technologically exciting and fastest growing businesses in the history of semiconductors. Find out more at http://www.awaveip.com
About Achronix Semiconductor Corporation
Achronix Semiconductor Corporation is a privately held, fabless semiconductor corporation based in Santa Clara, California and offers high-performance FPGA and embedded FPGA (eFPGA) solutions. Achronix's history is one of pushing the boundaries in the high-performance FPGA market. Achronix offerings include programmable FPGA fabrics, discrete high-performance and high-density FPGAs with hardwired system-level blocks, datacenter and HPC hardware accelerator boards, and best-in-class EDA software supporting all Achronix products. The company has sales offices and representatives in the United States, Europe, and China, and has a research and design office in Bangalore, India. Find out more at https://www.achronix.com
Achronix Semiconductor Corporation