IP Block targets video and graphics applications.
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Press Release Summary:
Silicon verified, 80 nm Line-Lock PLL IP Block uses digitally-programmable, low-jitter frequency synthesizer with high-resolution, 20-bit, noise shaping filter for fine-frequency tuning. Block has digital second loop and 2 programmable pixel clock outputs, and operates with pixel clocks up to 202.5 MHz. Occupying 0.55 mm2 of silicon, it dissipates 50 mW, with long-term peak-to-peak jitter of less than 0.06 unit intervals.
Original Press Release:
SNOWBUSH microelectronics Announces the Availability of Silicon Verified, 80 nm, Line-Lock PLL IP Block
TORONTO, March 6 // -- SNOWBUSH microelectronics, a leading supplier of analog design services and high performance IP available in the most advanced CMOS technologies, today announced the availability of a state-of-the-art Line-Lock PLL (LLPLL) IP block for the most demanding Video and Graphics applications.
The LLPLL makes use of the same digitally-programmable, low jitter, frequency synthesizer that is part of SNOWBUSH's most recent generation of SerDes IP. This synthesizer is in high volume production and has been implemented in a wide variety of technology nodes including 150, 130, 90, 80 and 65nm. It has been optimized for excellent power-supply rejection, temperature stability and extremely low jitter. It features a high resolution, 20-bit, noise shaping filter that provides fine-frequency tuning.
This Silicon-Hardened synthesizer is combined with a purely digital second loop to realize the line-lock function. The digital second loop is immune to all process and temperature variations. The digital implementation makes it easily portable to a wide number of processes.
The LLPLL has many unique features including a highly stable coast mode and proprietary jitter elimination circuitry that effectively eliminates jitter impulses that are common to the HSYNC and RGB inputs. These impulses can be caused by sudden changes in power supply demand due to peripherals such as hard disks powering up. The LLPLL has two independent and programmable pixel clock outputs, occupies 0.55mm2 of Silicon, dissipates 50mW, and can operate with pixel clocks up to 202.5 MHz. Long-term peak-to-peak jitter is less than 0.06 UI.
About SNOWBUSH microelectronics
SNOWBUSH microelectronics, a privately held company founded in 1998, is a leading supplier of analog design services and customizable high performance analog IP including a variety of silicon proven high speed SerDes. Combining a large pool of experienced design talent with leading edge analog design practices and best in class project management techniques, SNOWBUSH delivers the critical custom analog circuits needed to meet aggressive project schedules. Additional company and services information is available by contacting SNOWBUSH sales by phone at +1-416-925-5643 x239, by Email at sales@snowbush.com or on the World Wide Web at http://www.snowbush.com/.
Source: SNOWBUSH microelectronics
CONTACT: Paul Layman of SNOWBUSH microelectronics,
+1-416-925-5643, ext. 239
Web site: http://www.snowbush.com/
