XRT95L52/50 Targets Next Generation Metro Transport and Access Networks
Fremont, California, August 28, 2006 - Exar Corporation (Nasdaq: EXAR), a leading provider of high-performance, mixed-signal silicon solutions for the worldwide communications infrastructure, today added the XRT95L52 and XRT95L50 to its product portfolio of universal OC-48/STM-16, Quad OC-12/STM-4 & OC-3/STM-1 multi-protocol framers. These devices further extend Exar's technology leadership and reach into multi-service aggregation applications in next generation metro transport and access networks. The devices support flexible packet framing and encapsulation features combined with optimal SONET/SDH and PDH transport capabilities. The devices are ideal for low cost add/drop multiplexers, Optical Edge Devices (OED's), multi-service provisioning platforms and multi-service access applications.
"Driven by increasing bandwidth demands from businesses and consumers, the market continues its steady migration to packet-based infrastructures Exar's newest MPOS framers are ideal as they not only support current and future network requirements, but address needs raised by our customers," said Al Gharakhanian vice president of Marketing, Network and Transmission Products. "These devices are some of the highest density products available in the segment, and are another example of Exar's commitment to technology leadership."
The XRT95L52 and XRT95L50 support flexible encapsulation and framing features including
GFP, LAPS, ATM & PPP/BCP. The devices support an on-chip STS-1 cross-connect that is
capable of adding/dropping traffic at an STS-1 level of granularity to external line
interface/mapper devices such as the Voyager (XRT86SH328). This feature enables the design of highly integrated, yet flexible line cards and allows the devices to use one of the OC-12/OC-3 interfaces as a client access port for metro access applications. Both devices support Exar's industry first "G-header" interface (electrically compatible with the OIF compliant SPI-3 interface); it provides framing and encapsulation support for Fast Ethernet, Gigabit Ethernet, RPR, MPLS or proprietary client data to be transported over SONET/SDH or PDH links.
"The G-Header interface enables the devices to essentially map any protocol over TDM circuits in order to promote the usage of this device in both legacy and emerging metro access and transport applications," said Sid Yenamandra, director of marketing, Network and Transmission Products. "This feature also enables system vendors to future proof their equipment as new data protocols emerge."
The XRT95L52 is targeted for optimally mapping voice, data or video over next generation metro networks with features such as GFP in combination with virtual concatenation (high order and low order) and LCAS, and framing functions such as LAPS, PPP/BCP, and ATM. The XRT95L52 supports high order and low order virtual concatenation together with LCAS in a single device enabling optimal utilization of SONET bandwidth.
The XRT95L50 incorporates 48 DS3/E3 framers as well as fractional framers on a single chip together with mapper functions such as GFP, LAPS, PPP/BCP and ATM. This enables the device to aggregate and map PDH traffic into packets which is ideal for the access markets. The XRT95L50 also supports fractional DS3/E3 framers on a single chip which eliminates the need for these functions elsewhere in the system enabling a more modular system architecture.
The devices support the mappings for any standard combination of STS-48/AU4-16, STS-12c/AU-4c or STS-3c/AU4 or STS-1/AU3 and in the case of the XRT95L52, STS-1/VC-3-xV or STS-3c/VC-4- xV functions. Also, the devices provide pointer processing to accommodate timing offsets between optical interfaces. The device terminates section overhead and line overhead on OC-48/STM-16, 4xOC-12/, 16xOC-3 interfaces, and supports options to terminate and/or monitor STS path overhead (POH) and transport overhead (TOH).
A standard 8-bit, 16-bit, and 32-bit microprocessor interface provides performance monitoring and alarms required by GR.253 and ANSI T1.105 and supports tandem path monitoring for network failure sectionalization as required by ANSI T1.105. Other features of this product include SONET frame scrambling and descrambling, and support for 50 millisecond APS.
Prices, Packages, Availability and Additional Information
Samples of the part will be available within 60 days. The devices are available in a 780 ball PBGA operates at 3.3V with 5V tolerant I/Os over the industrial temperature range. Both devices are pincompatible with XRT95L53. In 1,000 piece quantities, the XRT95L52 is $295 and additional information on this product can be found at www.exar.com/product.php?ProdNumber=XRT95L52. In 1,000 piece quantities, the XRT95L50 is $200 and additional information on this product can be found at
http://www.exar.com/product.php?ProdNumber=XRT95L50. Additional information on SONET/SDH products can be found at www.exar.com/area.php?areaID=6.
Exar Corporation, celebrating its 20th year on NASDAQ, designs, develops and markets highperformance, analog and mixed-signal silicon solutions for a variety of markets including networking, serial communications, clock and timing, and storage. Leveraging its industry-proven analog design expertise and system-level knowledge, Exar delivers to customers a wide array of technology solutions for their current as well as next generation products. The Company is based in Fremont, CA, had fiscal 2006 revenues of $67.0 million, and employs approximately 250 people worldwide. For more information about the Company visit: www.exar.com.