Encoder/Decoder Core supports data rates up to 30 Mbps.
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Press Release Summary:
Low Density Parity Check Code Core supports numerous codes, modulation schemes, and data rates, which can be changed on-the-fly to accommodate changing channel conditions. LDPC codes provide a bit error rate that is closer to Shannon Limit than other error correction technologies for all code rates. Core implemented in FPGA supports block sizes up to 30 kbits, input quantization up to 6 bits, and programmable iterations up to 256 per block.
Original Press Release:
Comtech AHA Announces 30 Mbps Low Density Parity Check Code (LDPC) Encoder/Decoder Core
LDPC codes provide a BER that is closer to the Shannon Limit
Pullman, WA - July 12, 2004 - Comtech AHA Corporation (AHA), a wholly-owned subsidiary of Comtech Telecommunications Corp. (NASDAQ:CMTL), announces the availability of a Low Density Parity Check Code (LPDC) Forward Error Correction (FEC) encoder/decoder core. LDPC codes have demonstrated superior bit-error-rate (BER) performance over other commercially available FEC solutions. Combined with high iteration performance, LDPC codes provide a BER that is closer to the Shannon Limit than other available error correction technologies for all code rates.
Customers using the AHA LDPC error correction technology will be able to use their existing communications channel more efficiently than with other methods. The superior performance of the LDPC codes allows for increased transmission distance or reduced transmission power for a wide variety of communications systems. AHA's LDPC core is faster, more efficient, and more flexible in the codes it supports than other cores available today. The LDPC core provides benefits to many applications such as wireless, satellite communications, magnetic storage, and other data communications applications.
"AHA has a long history of putting complex, iterative decoders into silicon," said Jeff Hannon, Director of Engineering. "We've used this knowledge to build a very area efficient, high performance architecture that will be offered as a core and also used to design a standalone LDPC ASIC."
AHA's LDPC core supports numerous codes, modulation schemes and data rates, which can be changed "on-the-fly" to accommodate changing channel conditions. The core implemented in an FPGA supports data rates up to 30 Mbps; block sizes up to 30 Kbits; input quantization up to 6 bits; and programmable iterations up to 256 per block. The core can also be made available for implementation in an ASIC upon request.
In addition to the 30 Mbps LDPC core, AHA will be expanding its LDPC offerings by introducing a standalone LDPC integrated circuit in early 2005.
Pricing and Availability
Pricing varies depending upon customer requirements. Contact AHA by telephone at 509-334-1000 or via e-mail at sales@aha.com for pricing. The LDPC core is available now.
About AHA
Comtech AHA Corporation develops and markets superior integrated circuits and intellectual property core technology for communications systems architects worldwide. AHA provides flexible, cost-effective solutions for today's growing bandwidth and reliability challenges. Located in Pullman, Wash., AHA has been setting the standard in Forward Error Correction and Lossless Data Compression technology for more than a decade and offers a variety of standard and custom IC solutions for the data communications industry. Comtech AHA Corporation is a wholly-owned subsidiary of Comtech Telecommunications Corp. (NASDAQ:CMTL). For more information, visit www.aha.com.
A product brief describing the LDPC core can be downloaded from www.aha.com/show_pub.php?id=184.
A product specification for the LDPC core is available on request from sales@aha.com.
For more specific pricing information contact Carly Lister at 509-336-7115 or clister@aha.com
