EDS System has FPGA I/O and signal conditioning technology.

Press Release Summary:



RT-LAB Electric Drive Simulator features OP5000(TM) technology for Hardware-in-the-Loop simulation applications. Based on Xilinx Virtex II(TM) FPGA processor, OP5000 series captures and generates digital events to 10 ns resolution. It includes modules that offer 16-bit analog signal conversion with 16 simultaneous sample/hold channels at up to 1 MHz per channel. Fully integrated software and hardware solution has multiple parallel Pentium 4 processors.



Original Press Release:



Opal-RT Technologies' Latest RT-LAB Electric Drive Simulator Incorporates OP5000 FPGA IO and Signal Conditioning Technology



Opal-RT Technologies Inc., the industry leader in distributed real-time simulation on PC-based platforms, has released an enhanced version of the RT-LAB Electric Drive Simulator (EDS) that features their recently launched OP5000(TM) range of I/O and signal conditioning hardware, for Hardware-in-the-Loop (HIL) simulation applications.

Based on the Xilinx Virtex II(TM) FPGA processor, the OP5000 series features reprogrammable I/O interfaces that are designed to address I/O performance and channel density limitations inherent in modeling electric drives and many other switched power electronic circuits for HIL applications. In addition to capture and generation of digital events to 10 ns resolution, the OP5000 series includes modules that offer 16-bit analog signal conversion, with 16 simultaneous sample/hold channels at up to 1 MHz per channel.

Opal-RT's RT-LAB Electric Drive Simulator, first introduced in November 2003, is a new tool for designing, optimizing and testing advanced power electronic control, or tuning motor parameters for IGBT or thyristor power converters without having to build the physical prototype. Compatible with Simulink and the simPowerSystems blockset, it is a fully integrated software and hardware solution with multiple parallel Pentium 4 processors and is currently used by customers at General Electric, Toyota Hybrid Vehicle and Mitsubishi to simulate drives with PWM frequency up to 10,000 Hz in real-time for HIL testing of actual and prototype controllers, in order to accelerate the design process and reduce prototype construction and testing costs.

"The new RT-LAB Electric Drive Simulator represents another industry first for Opal-RT, through the use of clusters of low-cost Pentium processors, alongside reconfigurable FPGA-based I/O technology", said Paul Goossens, Opal-RT Technologies' Vice President of Marketing. "This approach is particularly useful for designers of electric drives because they can now simulate electric power converters and drives, down to the detailed switching of the power electronics at time steps below 10 us. Furthermore, with our real-time event capture and compensation tools, we can model switched circuits at an equivalent accuracy of 1 us.

The RT-LAB Electric Drive Simulator is based on unique parallel processing technologies that allow the design engineer to distribute complex models over several computation targets, running either the QNX(TM) or RedHawk(TM) Linux RTOS while transparently handling all synchronization, inter-processor data communication and signal I/O. This makes the RT-LAB Electric Drive Simulator readily scalable, allowing for increased computation power by simply adding more PC targets to the cluster.

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