Controller IP Cores target next-generation chip designs.
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Press Release Summary:
Based on preliminary version of PCI Express® 3.0 specification, Databahn(TM) Controller IP Cores accelerate overall deployment of PCIe 3.0 technology into storage and networking systems. Preliminary PCIe 3.0 specification increases PCIe 2.0 interconnect bandwidth from 5 GT/s to 8 GT/s. Cores support TLP Prefix, Atomic Operations, Resizable BARS, and Alternative Routing-ID, as well as scalable architecture up to 16 lanes, PIPE specification Gen 3, and Single-Root I/O Virtualization.
Original Press Release:
Denali Software First to Ship PCI Express 3.0 Controller IP Cores
Early Adopters of PCIe 3.0 to Benefit From Off-the-Shelf, Configurable PCIe IP Solution Targeting Increased Performance
SUNNYVALE, Calif., March 31 /-- Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced availability and first customer shipments of the latest Denali Databahn(TM) controller IP cores, based on the current preliminary version of the PCI Express(R) (PCIe) 3.0 specification, for use in next-generation chip designs. Denali's Databahn IP product was selected by leading fabless semiconductor companies to accelerate the overall deployment of PCIe 3.0 technology into high-performance storage and networking systems. Among other key features, the preliminary PCIe 3.0 specification increases the PCIe 2.0 interconnect performance bandwidth from 5 GT/s to 8 GT/s while preserving compatibility with software and mechanical interfaces.
"Together with the strong market acceptance of our PCIe 3.0 verification IP solution, this announcement positions us as the leading provider of IP solutions for the emerging PCIe 3.0 technology," said David Lin, vice president of Marketing for Denali Software. "Denali continues to collaborate with high-end customers to leverage our PCIe design and verification expertise to deliver a complete and robust IP solution to hit their market windows."
As the industry's first-to-market PCIe 3.0 solution, Denali's Databahn IP product provides full support of the preliminary PCIe 3.0 specification features including: TLP Prefix, Atomic Operations, Resizable BARS, Alternative Routing-ID, scalable architecture up to 16 lanes, PIPE specification Gen 3, as well as support for Single-Root I/O Virtualization. Access more detailed info about Databahn PCIe IP features and request an evaluation at: denali.com/en/products/databahn_pcie.jsp.
About Denali's PCI Express Solutions
Denali's extensive portfolio for deploying PCIe technology includes the industry's leading verification IP, design IP, and compliance suite, which are leveraged in an efficient ecosystem of IP and EDA vendors, PHY providers, and ASIC vendors and foundries. Learn more about the industry's most trusted solutions for PCIe technology at: denali.com/pcie.
About Denali Software
Denali Software, Inc. is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, USB, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Sunnyvale, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at denali.com.
Denali and Denali Software are registered trademarks of Denali Software, Inc. Databahn is a trademarks of Denali Software, Inc. All other trademarks are of their respective owners.
Web Site: http://denali.com/
