SAN JOSE, Calif., - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it plans to exhibit its latest intellectual property (IP) and processor technologies at this year's Flash Memory Summit at booth 616 from August 11 to 13, 2015, in Santa Clara, CA.
Cadence is scheduled to demonstrate its latest flash memory IP, verification models, and Tensilica® offload processor optimization for flash, which serves as the crucial component for many products in the consumer, computer and enterprise markets.
Tuesday, August 11, through Thursday, August 13, 2015
Booth 616 at the Flash Memory Summit
Santa Clara Convention Center
Santa Clara, CA
Cadence is offering a variety of opportunities to learn about the latest trends in IP and to interact with technology experts, users and partners. These include the following:
Cadence demonstrations in Booth 616:
• Latest ONFi and eMMC IPVerification memory models for the latest standards
• Tensilica offload processor optimization for flash A Cadence-sponsored event:
• Beer, Pizza and Chat with the Experts session on Tuesday, August 11, 7:00pm - 8:30pm
• Admission to this event is free for conference attendees. To register for the conference, go to https://www.expotracshows.com/flash-memory/2015/.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at http://www.cadence.com.
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SOURCE Cadence Design Systems, Inc.
Web Site: http://www.cadence.com