Advanced Hi-rel 'TO' Packages for RF, Optoelectronic, and MEMs Devices

October 28, 2019—Newburyport, MA—Electronic Products, Inc. (EPI) (www.elecprodinc.com) has recently announced advanced capabilities to produce Hi-rel Transistor Outline, or “TO”, packages and headers. Originally developed by the semiconductor and microelectronics industry in the 1950s, the TO design for packages and headers was created to support the early development of hermetic devices in a common suite of easy to implement package outlines.

While there are plastic versions of TO packages, EPI’s focus has been on improving upon standardized TO packages and headers made of metals that help meet the most rigorous hermetic standards and screening requirements of today’s Hi-rel semiconductor devices and components.

The basic TO or “metal can” package consists of a metal base with leads exiting through a glass seal. The glass sealing process is among the many areas in which EPI has made innovations, specifically in both their compression seal and matched seal technology. EPI’s matched seals typically use coefficient of thermal expansion (CTE) matched ASTM-F15 Alloy (Kovar) and CTE matched glass compositions. Their highest performing compression seals use plain carbon steel 1010 and ASTM-F30 (Alloy 52) with higher CTE to compress the glass upon cooling during the fusing process of the TO package or header. After device assembly in the package, the customer applies a metal lid which is expertly resistance welded with precision to the metal base to form a superior hermetic seal.

The TO design was developed to support the initiative in 1944 by the Joint Electron Device Engineering Council (JEDEC). JEDEC initially functioned within the engineering department of the Electronic Industries Association (EIA) where its primary activity was to develop and assign part numbers to devices. Over the next 50 years, JEDEC’s work expanded into developing test methods and product standards that proved vital to the development of the semiconductor industry. In addition to several standardized TO package outlines and header designs, among the other landmark standards that have come from JEDEC committees are:

• The ESD (electrostatic discharge) symbol used worldwide on semiconductor devices
• Specifications for computer memory, ranging from dynamic RAM chips and memory modules to DDR synchronous DRAM and flash components.
• Development and publication of a manual of common terms and definitions for the semiconductor industry.
• Standards, publications and educational events addressing the migration to lead-free manufacturing processes. One result of this work – J-STD-020 – is one of the most popular standards in JEDEC history.

Source: JEDEC https://www.jedec.org/

TO packages and headers are in use today in all facets of microelectronic applications on both the transmit and receive side of a transceiver system. They’re also proven in high-speed data transfer, infrared, and other opto-electronic applications. EPI’s TO packages and headers are qualified to the rigorous JESD9C standard which is used in conjunction with the most up-to-date test methods described by MIL-STD 883.

Micro-Electro-Mechanical Systems (MEMS) packaging represent a new area of microelectronic packaging applications for the TO package that EPI is developing advanced solutions for. MEMs systems are now enabling optical signals to be switched using a range of small, mobile mirrors and are becoming increasingly accepted in high volume applications such as LCD projectors.

EPI specializes in the design and manufacture of both legacy and custom engineered transistor outline (TO) packages and headers used in a variety of high-performance applications such as: RF, Microwave, wireless, optoelectronics, photonics, and power semiconductor applications. In addition to traditional “TO-cans”, optional styles include stamped, coined, cold-headed, drawn, machined, multi-pin headers, and more.

Given increasing global pressure for lower costs of electronics, device miniaturization, and higher performance, there are very few packaging styles that have withstood the test of time like the TO package. It is testimony to the commitment the original JEDEC designers put into providing versatility of design with a robust packaging approach that is readily hermetically sealed and ready to drop in.

To learn more, visit: https://www.elecprodinc.com/to-packages-and-header/

To request pricing, visit www.elecprodinc.com